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arm: dts: pfc-750-84xx-wosm: mram: adjust timings for 80 Mhz 8s-8s-8s mode

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Signed-off-by: Heinrich Toews <ht@twx-software.de>
This commit is contained in:
Heinrich Toews
2026-02-24 10:43:23 +01:00
parent 0918552295
commit 7587fa5670
1 changed files with 17 additions and 8 deletions
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arch/arm64/boot/dts/ti/k3-am623-pfc-750-84xx-wosm.dtsi
+17 -8
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@@ -195,17 +195,26 @@
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
spi-max-frequency = <25000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <4>;
/* 80 MHz Target */
spi-max-frequency = <80000000>;
/* PHY mode is highly recommended for >50MHz on Cadence controllers */
cdns,phy-mode;
/* Read delay: Start with 0.
If you get bit errors, try cdns,read-delay = <1>; */
cdns,read-delay = <0>;
/* Tighten timings for 80MHz operation (T=12.5ns) */
cdns,tshsl-ns = <25>; /* Chip Select high pulse width */
cdns,tsd2d-ns = <25>; /* Delay between two back-to-back transfers */
cdns,tchsh-ns = <6>; /* CS# hold time */
cdns,tslch-ns = <6>; /* CS# setup time */
spi-rx-bus-width = <8>;
spi-tx-bus-width = <8>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;