arm64: dts: imx8dxl: add lpuart device in cm40 subsystem
Add lpuart device in cm40 subsystem. Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@@ -20,6 +20,18 @@ cm40_subsys: bus@34000000 {
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ranges = <0x34000000 0x0 0x34000000 0x4000000>;
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interrupt-parent = <&cm40_intmux>;
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cm40_lpuart: serial@37220000 {
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compatible = "fsl,imx8qxp-lpuart";
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reg = <0x37220000 0x1000>;
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interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cm40_uart_lpcg IMX_LPCG_CLK_1>, <&cm40_uart_lpcg IMX_LPCG_CLK_0>;
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clock-names = "ipg", "baud";
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assigned-clocks = <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <24000000>;
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power-domains = <&pd IMX_SC_R_M4_0_UART>;
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status = "disabled";
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};
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cm40_i2c: i2c@37230000 {
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compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
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reg = <0x37230000 0x1000>;
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@@ -53,6 +65,18 @@ cm40_subsys: bus@34000000 {
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status = "disabled";
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};
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cm40_uart_lpcg: clock-controller@37620000 {
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compatible = "fsl,imx8qxp-lpcg";
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reg = <0x37620000 0x1000>;
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#clock-cells = <1>;
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clocks = <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>,
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<&cm40_ipg_clk>;
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clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>;
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clock-output-names = "cm40_lpcg_uart_clk",
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"cm40_lpcg_uart_ipg_clk";
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power-domains = <&pd IMX_SC_R_M4_0_UART>;
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};
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cm40_i2c_lpcg: clock-controller@37630000 {
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compatible = "fsl,imx8qxp-lpcg";
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reg = <0x37630000 0x1000>;
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