Jyri Sarha cb3cdef331 ASoC: SOF: ipc4: Add macros for chain-dma message bits
In the chained DMA mode, the firmware allocates buffers for the host
and link DMA, and takes care of copying data between host- and
link-DMA buffers in a low-latency thread. This is different to a
regular pipeline, no processing is allowed, and the connection between
host- and link DMA is handled with a dedicated IPC.

This patch exposes the macros needed to create the required IPC messages.

Signed-off-by: Jyri Sarha <jyri.sarha@intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20230321092654.7292-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-21 12:13:30 +00:00
2023-03-05 10:49:37 -08:00
2023-03-12 16:36:44 -07:00

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