TWxSoftware/twx-linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm64: dts: mediatek: mt8195: Assign USB 3.0 PHY to xhci1 by default

Browse Source 
xhci1 has both USB 2.0 and USB 3.0 host capabilities. By default both
are assumed to be enabled when the controller is enabled. To disable
either one, an extra property is used.

Since the default has both enabled, both PHYs should also be assigned
to the host controller. If a specific design uses only either one,
the board specific dts file can override the PHY assignment together
with adding the "mediatek,u[23]p-dis-msk" property. This keeps both
changes together.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20240731034411.371178-4-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This commit is contained in:
Chen-Yu Tsai
2024-07-31 11:44:10 +08:00
committed by AngeloGioacchino Del Regno
parent be985531a5
commit fe035fa6f5
5 changed files with 4 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+1
View File
@@ -1397,6 +1397,7 @@
&xhci1 {
status = "okay";
phys = <&u2port1 PHY_TYPE_USB2>;
rx-fifo-depth = <3072>;
vusb33-supply = <&mt6359_vusb_ldo_reg>;
vbus-supply = <&usb_vbus>;
arch/arm64/boot/dts/mediatek/mt8195.dtsi
+1 -1
View File
@@ -1444,7 +1444,7 @@
<0 0x11293e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&u2port1 PHY_TYPE_USB2>;
phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>;
assigned-clocks = <&topckgen CLK_TOP_USB_TOP_1P>,
<&topckgen CLK_TOP_SSUSB_XHCI_1P>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts
-2
View File
@@ -904,8 +904,6 @@
};
&xhci1 {
phys = <&u2port1 PHY_TYPE_USB2>,
<&u3port1 PHY_TYPE_USB3>;
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts
+1
View File
@@ -1111,6 +1111,7 @@
/* USB2.0 M.2 Key-B */
&xhci1 {
phys = <&u2port1 PHY_TYPE_USB2>;
vusb33-supply = <&mt6359_vusb_ldo_reg>;
mediatek,u3p-dis-msk = <0x01>;
status = "okay";
arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
+1
View File
@@ -894,6 +894,7 @@
};
&xhci1 {
phys = <&u2port1 PHY_TYPE_USB2>;
/* MT7921's USB Bluetooth has issues with USB2 LPM */
usb2-lpm-disable;
vusb33-supply = <&mt6359_vusb_ldo_reg>;