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drm/amd/display: Adjust dto fix coverage

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[WHY & HOW]
Unnecessary to affect legacy APU's dto src sel during dpms behaviour

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ausef Yousof <Ausef.Yousof@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ausef Yousof
2025-05-29 18:22:21 -04:00
committed by Alex Deucher
parent 5fa62c87cf
commit f6d7238c92
2 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+1 -1
View File
@@ -1186,7 +1186,7 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
if (dccg) {
dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);
dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);
if (dc->ctx->dce_version == DCN_VERSION_3_15) {
if (!(dc->ctx->dce_version >= DCN_VERSION_3_5)) {
if (dccg && dccg->funcs->set_dtbclk_dto)
dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
}
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+1 -1
View File
@@ -2871,7 +2871,7 @@ void dcn20_reset_back_end_for_pipe(
link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF;
}
if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx) && dccg
&& dc->ctx->dce_version != DCN_VERSION_3_15) {
&& dc->ctx->dce_version >= DCN_VERSION_3_5) {
dto_params.otg_inst = pipe_ctx->stream_res.tg->inst;
dto_params.timing = &pipe_ctx->stream->timing;
if (dccg && dccg->funcs->set_dtbclk_dto)