iio: adc: ad7606: fix serial register access

Fix register read/write routine as per datasheet.

When reading multiple consecutive registers, only the first one is read
properly. This is due to missing chip select deassert and assert again
between first and second 16bit transfer, as shown in the datasheet
AD7606C-16, rev 0, figure 110.

Fixes: f2a22e1e17 ("iio: adc: ad7606: Add support for software mode for ad7616")
Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Link: https://patch.msgid.link/20250418-wip-bl-ad7606-fix-reg-access-v3-1-d5eeb440c738@baylibre.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

This commit is contained in:

Angelo Dureghello

2025-04-18 20:37:53 +02:00

committed by

Jonathan Cameron

parent ffcd19e9f4

commit f083f8a21c

1 changed files with 1 additions and 1 deletions

									
										drivers/iio/adc/ad7606_spi.c
									
		+1
		-1
	
												View File
												
				@@ -131,7 +131,7 @@ static int ad7606_spi_reg_read(struct ad7606_state *st, unsigned int addr)

						{

							.tx_buf = &st->d16[0],

							.len = 2,

							.cs_change = 0,

							.cs_change = 1,

						}, {

							.rx_buf = &st->d16[1],

							.len = 2,