TWxSoftware/twx-linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

net: stmmac: mediatek: simplify set_interface() methods

Browse Source 
Use the phy_intf_sel field value when deciding what other options to
apply for the configuration register.

Note that this will allow GMII as well as MII as the phy_intf_sel
value is the same for both.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Link: https://patch.msgid.link/E1vIjU4-0000000DqtV-3qsX@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Russell King (Oracle)
2025-11-11 08:12:12 +00:00
committed by Jakub Kicinski
parent d9c7964fd9
commit f06620091f
1 changed files with 12 additions and 38 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
+12 -38
View File
@@ -110,26 +110,13 @@ static const char * const mt8195_dwmac_clk_l[] = {
static int mt2712_set_interface(struct mediatek_dwmac_plat_data *plat,
u8 phy_intf_sel)
{
int rmii_clk_from_mac = plat->rmii_clk_from_mac ? RMII_CLK_SRC_INTERNAL : 0;
int rmii_rxc = plat->rmii_rxc ? RMII_CLK_SRC_RXC : 0;
u32 intf_val;
u32 intf_val = phy_intf_sel;
intf_val = phy_intf_sel;
/* select phy interface in top control domain */
switch (plat->phy_mode) {
case PHY_INTERFACE_MODE_RMII:
intf_val |= rmii_rxc | rmii_clk_from_mac;
break;
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_TXID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_ID:
break;
default:
dev_err(plat->dev, "phy interface not supported\n");
return -EINVAL;
if (phy_intf_sel == PHY_INTF_SEL_RMII) {
if (plat->rmii_clk_from_mac)
intf_val |= RMII_CLK_SRC_INTERNAL;
if (plat->rmii_rxc)
intf_val |= RMII_CLK_SRC_RXC;
}
regmap_write(plat->peri_regmap, PERI_ETH_PHY_INTF_SEL, intf_val);
@@ -289,26 +276,13 @@ static const struct mediatek_dwmac_variant mt2712_gmac_variant = {
static int mt8195_set_interface(struct mediatek_dwmac_plat_data *plat,
u8 phy_intf_sel)
{
int rmii_clk_from_mac = plat->rmii_clk_from_mac ? MT8195_RMII_CLK_SRC_INTERNAL : 0;
int rmii_rxc = plat->rmii_rxc ? MT8195_RMII_CLK_SRC_RXC : 0;
u32 intf_val;
u32 intf_val = FIELD_PREP(MT8195_ETH_INTF_SEL, phy_intf_sel);
intf_val = FIELD_PREP(MT8195_ETH_INTF_SEL, phy_intf_sel);
/* select phy interface in top control domain */
switch (plat->phy_mode) {
case PHY_INTERFACE_MODE_RMII:
intf_val |= rmii_rxc | rmii_clk_from_mac;
break;
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_TXID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_ID:
break;
default:
dev_err(plat->dev, "phy interface not supported\n");
return -EINVAL;
if (phy_intf_sel == PHY_INTF_SEL_RMII) {
if (plat->rmii_clk_from_mac)
intf_val |= MT8195_RMII_CLK_SRC_INTERNAL;
if (plat->rmii_rxc)
intf_val |= MT8195_RMII_CLK_SRC_RXC;
}
/* MT8195 only support external PHY */