clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable
The PCIe GDSCs on most Qualcomm platforms expect the OS to always
consider collapse requests as successful. This also concerns SM8550.
Add the VOTABLE flag to the GDSCs in question to comply with these
expectations.
Fixes: 955f2ea3b9 ("clk: qcom: Add GCC driver for SM8550")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-4-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
committed by
Bjorn Andersson
parent
1fe8273c8d
commit
e7fe73fc6b
@@ -3002,7 +3002,7 @@ static struct gdsc pcie_0_gdsc = {
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.name = "pcie_0_gdsc",
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},
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.pwrsts = PWRSTS_OFF_ON,
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.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
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.flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
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};
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static struct gdsc pcie_0_phy_gdsc = {
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@@ -3011,7 +3011,7 @@ static struct gdsc pcie_0_phy_gdsc = {
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.name = "pcie_0_phy_gdsc",
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},
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.pwrsts = PWRSTS_OFF_ON,
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.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
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.flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
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};
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static struct gdsc pcie_1_gdsc = {
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@@ -3020,7 +3020,7 @@ static struct gdsc pcie_1_gdsc = {
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.name = "pcie_1_gdsc",
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},
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.pwrsts = PWRSTS_OFF_ON,
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.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
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.flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
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};
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static struct gdsc pcie_1_phy_gdsc = {
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@@ -3029,7 +3029,7 @@ static struct gdsc pcie_1_phy_gdsc = {
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.name = "pcie_1_phy_gdsc",
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},
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.pwrsts = PWRSTS_OFF_ON,
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.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
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.flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
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};
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static struct gdsc ufs_phy_gdsc = {
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