iommu/amd: Fix argument order in amd_iommu_dev_flush_pasid_all()
commit8386207f37upstream. An incorrect argument order calling amd_iommu_dev_flush_pasid_pages() causes improper flushing of the IOMMU, leaving the old value of GCR3 from a previous process attached to the same PASID. The function has the signature: void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data, ioasid_t pasid, u64 address, size_t size) Correct the argument order. Cc: stable@vger.kernel.org Fixes:474bf01ed9("iommu/amd: Add support for device based TLB invalidation") Signed-off-by: Eliav Bar-ilan <eliavb@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Link: https://lore.kernel.org/r/0-v1-fc6bc37d8208+250b-amd_pasid_flush_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Greg Kroah-Hartman
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1b1f319159
commit
e5be9fef68
@@ -1550,8 +1550,8 @@ void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,
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void amd_iommu_dev_flush_pasid_all(struct iommu_dev_data *dev_data,
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ioasid_t pasid)
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{
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amd_iommu_dev_flush_pasid_pages(dev_data, 0,
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CMD_INV_IOMMU_ALL_PAGES_ADDRESS, pasid);
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amd_iommu_dev_flush_pasid_pages(dev_data, pasid, 0,
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CMD_INV_IOMMU_ALL_PAGES_ADDRESS);
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}
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void amd_iommu_domain_flush_complete(struct protection_domain *domain)
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