drm/amdkfd: move SDMA queue reset capability check to node_show
Relocate the per-SDMA queue reset capability check from
kfd_topology_set_capabilities() to node_show() to ensure we read the
latest value of sdma.supported_reset after all IP blocks are initialized.
Fixes: ceb7114c96 ("drm/amdkfd: flag per-sdma queue reset supported to user space")
Reviewed-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
855a2a029a
commit
e17df7b086
@@ -510,6 +510,10 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
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dev->node_props.capability |=
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HSA_CAP_AQL_QUEUE_DOUBLE_MAP;
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if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0) &&
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(dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
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dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;
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sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_fcompute",
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dev->node_props.max_engine_clk_fcompute);
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@@ -2008,8 +2012,6 @@ static void kfd_topology_set_capabilities(struct kfd_topology_device *dev)
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if (!amdgpu_sriov_vf(dev->gpu->adev))
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dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;
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if (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)
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dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;
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} else {
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dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 |
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HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
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