arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level
ECAP nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. (These and the EPWM nodes could be used to trigger internal actions but they are not used like that currently) As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the ECAP nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20221017192532.23825-6-afd@ti.com
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committed by
Nishanth Menon
parent
ebc0ed718d
commit
dcac8eaaa9
@@ -988,6 +988,7 @@
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power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 51 0>;
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clock-names = "fck";
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status = "disabled";
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};
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ecap1: pwm@23110000 {
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@@ -997,6 +998,7 @@
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power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 52 0>;
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clock-names = "fck";
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status = "disabled";
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};
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ecap2: pwm@23120000 {
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@@ -1006,6 +1008,7 @@
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power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 53 0>;
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clock-names = "fck";
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status = "disabled";
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};
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main_rti0: watchdog@e000000 {
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@@ -567,19 +567,12 @@
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};
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&ecap0 {
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status = "okay";
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/* PWM is available on Pin 1 of header J12 */
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pinctrl-names = "default";
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pinctrl-0 = <&main_ecap0_pins_default>;
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};
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&ecap1 {
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status = "disabled";
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};
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&ecap2 {
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status = "disabled";
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};
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&icssg0_mdio {
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status = "disabled";
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};
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@@ -566,19 +566,12 @@
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};
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&ecap0 {
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status = "okay";
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/* PWM is available on Pin 1 of header J3 */
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pinctrl-names = "default";
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pinctrl-0 = <&main_ecap0_pins_default>;
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};
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&ecap1 {
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status = "disabled";
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};
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&ecap2 {
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status = "disabled";
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};
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&icssg0_mdio {
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status = "disabled";
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};
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