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Merge tag 'renesas-r9a09g047-dt-binding-defs-tag3' into renesas-clk-for-v6.16

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Renesas RZ/G3E XSPI and GBETH Core DT Binding Definitions

XSPI and Gigabit Ethernet PTP reference core clock DT binding
definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and
DT source files.
This commit is contained in:
Geert Uytterhoeven
2025-05-08 20:17:14 +02:00
parent aff664cc8c f21923f3f4
commit d4da08ea37
1 changed files with 3 additions and 0 deletions
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include/dt-bindings/clock/renesas,r9a09g047-cpg.h
+3
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@@ -17,5 +17,8 @@
#define R9A09G047_CM33_CLK0 6
#define R9A09G047_CST_0_SWCLKTCK 7
#define R9A09G047_IOTOP_0_SHCLK 8
#define R9A09G047_SPI_CLK_SPI 9
#define R9A09G047_GBETH_0_CLK_PTP_REF_I 10
#define R9A09G047_GBETH_1_CLK_PTP_REF_I 11
#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ */