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drm/amd/pm: fulfill the missing enablement for vega12/vega20 L2H and H2L interrupts

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The feature mask bit was not correctly cleared. Without that, the L2H
and H2L interrupts cannot be enabled.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
2023-06-21 07:55:45 +08:00
committed by Alex Deucher
parent 2aafcdd6a6
commit cfc7d8314b
2 changed files with 6 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_thermal.c
+3 -1
View File
@@ -192,7 +192,9 @@ static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
val &= ~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK;
val &= ~THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK;
val &= ~THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK;
WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c
+3 -1
View File
@@ -263,7 +263,9 @@ static int vega20_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
val &= ~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK;
val &= ~THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK;
val &= ~THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK;
WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);