arm64: dts: mediatek: add afe support for mt8365 SoC
Add audio front end support of MT8365 SoC. Update the file header. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20240226-audio-i350-v8-4-e80a57d026ce@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Matthias Brugger
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@@ -2,9 +2,11 @@
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/*
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* (C) 2018 MediaTek Inc.
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* Copyright (C) 2022 BayLibre SAS
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* Fabien Parent <fparent@baylibre.com>
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* Bernhard Rosenkränzer <bero@baylibre.com>
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* Authors: Fabien Parent <fparent@baylibre.com>
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* Bernhard Rosenkränzer <bero@baylibre.com>
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* Alexandre Mergnat <amergnat@baylibre.com>
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*/
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#include <dt-bindings/clock/mediatek,mt8365-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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@@ -812,6 +814,43 @@
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reg = <0 0x19020000 0 0x1000>;
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#clock-cells = <1>;
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};
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afe: audio-controller@11220000 {
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compatible = "mediatek,mt8365-afe-pcm";
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reg = <0 0x11220000 0 0x1000>;
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#sound-dai-cells = <0>;
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clocks = <&clk26m>,
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<&topckgen CLK_TOP_AUDIO_SEL>,
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<&topckgen CLK_TOP_AUD_I2S0_M>,
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<&topckgen CLK_TOP_AUD_I2S1_M>,
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<&topckgen CLK_TOP_AUD_I2S2_M>,
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<&topckgen CLK_TOP_AUD_I2S3_M>,
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<&topckgen CLK_TOP_AUD_ENGEN1_SEL>,
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<&topckgen CLK_TOP_AUD_ENGEN2_SEL>,
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<&topckgen CLK_TOP_AUD_1_SEL>,
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<&topckgen CLK_TOP_AUD_2_SEL>,
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<&topckgen CLK_TOP_APLL_I2S0_SEL>,
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<&topckgen CLK_TOP_APLL_I2S1_SEL>,
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<&topckgen CLK_TOP_APLL_I2S2_SEL>,
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<&topckgen CLK_TOP_APLL_I2S3_SEL>;
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clock-names = "top_clk26m_clk",
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"top_audio_sel",
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"audio_i2s0_m",
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"audio_i2s1_m",
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"audio_i2s2_m",
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"audio_i2s3_m",
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"engen1",
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"engen2",
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"aud1",
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"aud2",
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"i2s0_m_sel",
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"i2s1_m_sel",
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"i2s2_m_sel",
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"i2s3_m_sel";
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&spm MT8365_POWER_DOMAIN_AUDIO>;
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status = "disabled";
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};
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};
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timer {
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