ARM: dts: renesas: r8a73a4: Fix external clocks and clock rate
[ Upstream commit090c409457] External clocks should be defined as zero-Hz clocks in the SoC .dtsi, and overridden in the board .dts when present. Correct the clock rate of extal1 from 25 to 26 MHz, to match the crystal oscillator present on the APE6-EVM board. Fixes:a76809a329("ARM: shmobile: r8a73a4: Common clock framework DT description") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/1692bc8cd465d62168cbf110522ad62a7af3f606.1705315614.git.geert+renesas@glider.be Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Sasha Levin
parent
6798cf0aaa
commit
a81edfc5ec
@@ -209,6 +209,18 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&extal1_clk {
|
||||
clock-frequency = <26000000>;
|
||||
};
|
||||
|
||||
&extal2_clk {
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
&extalr_clk {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
&pfc {
|
||||
scifa0_pins: scifa0 {
|
||||
groups = "scifa0_data";
|
||||
|
||||
@@ -450,17 +450,20 @@
|
||||
extalr_clk: extalr {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
extal1_clk: extal1 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <25000000>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
extal2_clk: extal2 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <48000000>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
fsiack_clk: fsiack {
|
||||
compatible = "fixed-clock";
|
||||
|
||||
Reference in New Issue
Block a user