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net: ipa: support zeroing new cache tables

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IPA v5.0+ separates the configuration of entries in the cached
(previously "hashed") routing and filtering tables into distinct
registers.  Previously a single "filter and router" register updated
entries in both tables at once; now the routing and filter table
caches have separate registers that define their content.

This patch updates the code that zeroes entries in the cached filter
and router tables to support IPA versions including v5.0+.

Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Alex Elder
2023-01-30 15:01:55 -06:00
committed by Jakub Kicinski
parent 8e7c89d84a
commit a08cedc31d
1 changed files with 28 additions and 10 deletions
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drivers/net/ipa/ipa_table.c
+28 -10
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@@ -499,13 +499,22 @@ static void ipa_filter_tuple_zero(struct ipa_endpoint *endpoint)
u32 offset;
u32 val;
reg = ipa_reg(ipa, ENDP_FILTER_ROUTER_HSH_CFG);
if (ipa->version < IPA_VERSION_5_0) {
reg = ipa_reg(ipa, ENDP_FILTER_ROUTER_HSH_CFG);
offset = ipa_reg_n_offset(reg, endpoint_id);
val = ioread32(endpoint->ipa->reg_virt + offset);
offset = ipa_reg_n_offset(reg, endpoint_id);
val = ioread32(endpoint->ipa->reg_virt + offset);
/* Zero all filter-related fields, preserving the rest */
val &= ~ipa_reg_fmask(reg, FILTER_HASH_MSK_ALL);
/* Zero all filter-related fields, preserving the rest */
val &= ~ipa_reg_fmask(reg, FILTER_HASH_MSK_ALL);
} else {
/* IPA v5.0 separates filter and router cache configuration */
reg = ipa_reg(ipa, ENDP_FILTER_CACHE_CFG);
offset = ipa_reg_n_offset(reg, endpoint_id);
/* Zero all filter-related fields */
val = 0;
}
iowrite32(val, endpoint->ipa->reg_virt + offset);
}
@@ -549,13 +558,22 @@ static void ipa_route_tuple_zero(struct ipa *ipa, u32 route_id)
u32 offset;
u32 val;
reg = ipa_reg(ipa, ENDP_FILTER_ROUTER_HSH_CFG);
offset = ipa_reg_n_offset(reg, route_id);
if (ipa->version < IPA_VERSION_5_0) {
reg = ipa_reg(ipa, ENDP_FILTER_ROUTER_HSH_CFG);
offset = ipa_reg_n_offset(reg, route_id);
val = ioread32(ipa->reg_virt + offset);
val = ioread32(ipa->reg_virt + offset);
/* Zero all route-related fields, preserving the rest */
val &= ~ipa_reg_fmask(reg, ROUTER_HASH_MSK_ALL);
/* Zero all route-related fields, preserving the rest */
val &= ~ipa_reg_fmask(reg, ROUTER_HASH_MSK_ALL);
} else {
/* IPA v5.0 separates filter and router cache configuration */
reg = ipa_reg(ipa, ENDP_ROUTER_CACHE_CFG);
offset = ipa_reg_n_offset(reg, route_id);
/* Zero all route-related fields */
val = 0;
}
iowrite32(val, ipa->reg_virt + offset);
}