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net: ethernet: ti: am65-cpsw: Enable USXGMII mode for J7200 CPSW5G

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TI's J7200 SoC supports USXGMII mode. Add USXGMII mode to the
extra_modes member of the J7200 SoC data.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://patch.msgid.link/20241010150543.2620448-1-s-vadapalli@ti.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Siddharth Vadapalli
2024-10-10 20:35:43 +05:30
committed by Paolo Abeni
parent 1758af47b9
commit 97802ffca7
1 changed files with 2 additions and 1 deletions
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drivers/net/ethernet/ti/am65-cpsw-nuss.c
+2 -1
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@@ -3372,7 +3372,8 @@ static const struct am65_cpsw_pdata j7200_cpswxg_pdata = {
.quirks = 0,
.ale_dev_id = "am64-cpswxg",
.fdqring_mode = K3_RINGACC_RING_MODE_RING,
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII),
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
BIT(PHY_INTERFACE_MODE_USXGMII),
};
static const struct am65_cpsw_pdata j721e_cpswxg_pdata = {