clk: qcom: gcc-sm6350: Add missing parent_map for two clocks
If a clk_rcg2 has a parent, it should also have parent_map defined,
otherwise we'll get a NULL pointer dereference when calling clk_set_rate
like the following:
[ 3.388105] Call trace:
[ 3.390664] qcom_find_src_index+0x3c/0x70 (P)
[ 3.395301] qcom_find_src_index+0x1c/0x70 (L)
[ 3.399934] _freq_tbl_determine_rate+0x48/0x100
[ 3.404753] clk_rcg2_determine_rate+0x1c/0x28
[ 3.409387] clk_core_determine_round_nolock+0x58/0xe4
[ 3.421414] clk_core_round_rate_nolock+0x48/0xfc
[ 3.432974] clk_core_round_rate_nolock+0xd0/0xfc
[ 3.444483] clk_core_set_rate_nolock+0x8c/0x300
[ 3.455886] clk_set_rate+0x38/0x14c
Add the parent_map property for two clocks where it's missing and also
un-inline the parent_data as well to keep the matching parent_map and
parent_data together.
Fixes: 131abae905 ("clk: qcom: Add SM6350 GCC driver")
Cc: stable@vger.kernel.org
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241220-sm6350-parent_map-v1-1-64f3d04cb2eb@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
committed by
Bjorn Andersson
parent
89aa5925d2
commit
96fe1a7ee4
@@ -182,6 +182,14 @@ static const struct clk_parent_data gcc_parent_data_2_ao[] = {
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{ .hw = &gpll0_out_odd.clkr.hw },
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};
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static const struct parent_map gcc_parent_map_3[] = {
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{ P_BI_TCXO, 0 },
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};
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static const struct clk_parent_data gcc_parent_data_3[] = {
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{ .fw_name = "bi_tcxo" },
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};
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static const struct parent_map gcc_parent_map_4[] = {
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{ P_BI_TCXO, 0 },
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{ P_GPLL0_OUT_MAIN, 1 },
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@@ -701,13 +709,12 @@ static struct clk_rcg2 gcc_ufs_phy_phy_aux_clk_src = {
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.cmd_rcgr = 0x3a0b0,
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.mnd_width = 0,
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.hid_width = 5,
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.parent_map = gcc_parent_map_3,
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.freq_tbl = ftbl_gcc_ufs_phy_phy_aux_clk_src,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_ufs_phy_phy_aux_clk_src",
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.parent_data = &(const struct clk_parent_data){
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.fw_name = "bi_tcxo",
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},
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.num_parents = 1,
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.parent_data = gcc_parent_data_3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_3),
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.ops = &clk_rcg2_ops,
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},
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};
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@@ -764,13 +771,12 @@ static struct clk_rcg2 gcc_usb30_prim_mock_utmi_clk_src = {
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.cmd_rcgr = 0x1a034,
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.mnd_width = 0,
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.hid_width = 5,
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.parent_map = gcc_parent_map_3,
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.freq_tbl = ftbl_gcc_usb30_prim_mock_utmi_clk_src,
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.clkr.hw.init = &(struct clk_init_data){
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.name = "gcc_usb30_prim_mock_utmi_clk_src",
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.parent_data = &(const struct clk_parent_data){
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.fw_name = "bi_tcxo",
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},
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.num_parents = 1,
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.parent_data = gcc_parent_data_3,
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.num_parents = ARRAY_SIZE(gcc_parent_data_3),
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.ops = &clk_rcg2_ops,
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},
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};
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