iommu/amd: Make amd_iommu_domain_flush_complete() static
AMD driver uses amd_iommu_domain_flush_complete() function to make sure IOMMU processed invalidation commands before proceeding. Ideally this should be called from functions which updates DTE/invalidates caches. There is no need to call this function explicitly. This patches makes below changes : - Rename amd_iommu_domain_flush_complete() -> domain_flush_complete() and make it as static function. - Rearrage domain_flush_complete() to avoid forward declaration. - Update amd_iommu_update_and_flush_device_table() to call domain_flush_complete(). Signed-off-by: Vasant Hegde <vasant.hegde@amd.com> Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Link: https://lore.kernel.org/r/20240828111029.5429-7-vasant.hegde@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
committed by
Joerg Roedel
parent
845bd6ac43
commit
964877dc26
@@ -88,7 +88,6 @@ void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
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void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
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void amd_iommu_domain_update(struct protection_domain *domain);
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void amd_iommu_dev_update_dte(struct iommu_dev_data *dev_data, bool set);
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void amd_iommu_domain_flush_complete(struct protection_domain *domain);
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void amd_iommu_domain_flush_pages(struct protection_domain *domain,
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u64 address, size_t size);
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void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,
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@@ -175,7 +175,6 @@ static bool increase_address_space(struct protection_domain *domain,
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domain->iop.root = pte;
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domain->iop.mode += 1;
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amd_iommu_update_and_flush_device_table(domain);
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amd_iommu_domain_flush_complete(domain);
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/*
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* Device Table needs to be updated and flushed before the new root can
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+19
-18
@@ -1249,6 +1249,22 @@ out_unlock:
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return ret;
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}
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static void domain_flush_complete(struct protection_domain *domain)
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{
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int i;
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for (i = 0; i < amd_iommu_get_num_iommus(); ++i) {
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if (domain && !domain->dev_iommu[i])
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continue;
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/*
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* Devices of this domain are behind this IOMMU
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* We need to wait for completion of all commands.
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*/
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iommu_completion_wait(amd_iommus[i]);
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}
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}
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static int iommu_flush_dte(struct amd_iommu *iommu, u16 devid)
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{
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struct iommu_cmd cmd;
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@@ -1485,7 +1501,7 @@ void amd_iommu_domain_flush_pages(struct protection_domain *domain,
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__domain_flush_pages(domain, address, size);
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/* Wait until IOMMU TLB and all device IOTLB flushes are complete */
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amd_iommu_domain_flush_complete(domain);
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domain_flush_complete(domain);
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return;
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}
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@@ -1525,7 +1541,7 @@ void amd_iommu_domain_flush_pages(struct protection_domain *domain,
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}
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/* Wait until IOMMU TLB and all device IOTLB flushes are complete */
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amd_iommu_domain_flush_complete(domain);
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domain_flush_complete(domain);
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}
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/* Flush the whole IO/TLB for a given protection domain - including PDE */
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@@ -1558,22 +1574,6 @@ static void dev_flush_pasid_all(struct iommu_dev_data *dev_data,
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CMD_INV_IOMMU_ALL_PAGES_ADDRESS, pasid);
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}
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void amd_iommu_domain_flush_complete(struct protection_domain *domain)
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{
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int i;
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for (i = 0; i < amd_iommu_get_num_iommus(); ++i) {
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if (domain && !domain->dev_iommu[i])
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continue;
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/*
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* Devices of this domain are behind this IOMMU
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* We need to wait for completion of all commands.
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*/
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iommu_completion_wait(amd_iommus[i]);
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}
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}
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/* Flush the not present cache if it exists */
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static void domain_flush_np_cache(struct protection_domain *domain,
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dma_addr_t iova, size_t size)
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@@ -1615,6 +1615,7 @@ void amd_iommu_update_and_flush_device_table(struct protection_domain *domain)
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{
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update_device_table(domain);
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domain_flush_devices(domain);
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domain_flush_complete(domain);
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}
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void amd_iommu_domain_update(struct protection_domain *domain)
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