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Merge tag 'v6.6.65' into v6.6-rt

Browse Source 
This is the 6.6.65 stable release
This commit is contained in:
Clark Williams
2024-12-17 07:21:14 -06:00
parent 664a012455 943e0aeece
commit 94c4704abd
766 changed files with 7255 additions and 3555 deletions
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Documentation/ABI/testing/sysfs-fs-f2fs
+5 -2
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@@ -311,10 +311,13 @@ Description: Do background GC aggressively when set. Set to 0 by default.
GC approach and turns SSR mode on.
gc urgent low(2): lowers the bar of checking I/O idling in
order to process outstanding discard commands and GC a
little bit aggressively. uses cost benefit GC approach.
little bit aggressively. always uses cost benefit GC approach,
and will override age-threshold GC approach if ATGC is enabled
at the same time.
gc urgent mid(3): does GC forcibly in a period of given
gc_urgent_sleep_time and executes a mid level of I/O idling check.
uses cost benefit GC approach.
always uses cost benefit GC approach, and will override
age-threshold GC approach if ATGC is enabled at the same time.
What: /sys/fs/f2fs/<disk>/gc_urgent_sleep_time
Date: August 2017
Documentation/RCU/stallwarn.rst
+1 -1
View File
@@ -249,7 +249,7 @@ ticks this GP)" indicates that this CPU has not taken any scheduling-clock
interrupts during the current stalled grace period.
The "idle=" portion of the message prints the dyntick-idle state.
The hex number before the first "/" is the low-order 12 bits of the
The hex number before the first "/" is the low-order 16 bits of the
dynticks counter, which will have an even-numbered value if the CPU
is in dyntick-idle mode and an odd-numbered value otherwise. The hex
number between the two "/"s is the value of the nesting, which will be
Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml
+18 -4
View File
@@ -26,9 +26,21 @@ properties:
description:
Specifies the reference clock(s) from which the output frequency is
derived. This must either reference one clock if only the first clock
input is connected or two if both clock inputs are connected.
minItems: 1
maxItems: 2
input is connected or two if both clock inputs are connected. The last
clock is the AXI bus clock that needs to be enabled so we can access the
core registers.
minItems: 2
maxItems: 3
clock-names:
oneOf:
- items:
- const: clkin1
- const: s_axi_aclk
- items:
- const: clkin1
- const: clkin2
- const: s_axi_aclk
'#clock-cells':
const: 0
@@ -40,6 +52,7 @@ required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'
additionalProperties: false
@@ -50,5 +63,6 @@ examples:
compatible = "adi,axi-clkgen-2.00.a";
#clock-cells = <0>;
reg = <0xff000000 0x1000>;
clocks = <&osc 1>;
clocks = <&osc 1>, <&clkc 15>;
clock-names = "clkin1", "s_axi_aclk";
};
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
+1 -1
View File
@@ -26,7 +26,7 @@ properties:
maxItems: 1
spi-max-frequency:
maximum: 30000000
maximum: 66000000
reset-gpios:
maxItems: 1
Documentation/devicetree/bindings/serial/rs485.yaml
+9 -10
View File
@@ -18,16 +18,15 @@ properties:
description: prop-encoded-array <a b>
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
items:
- description: Delay between rts signal and beginning of data sent in
milliseconds. It corresponds to the delay before sending data.
default: 0
maximum: 100
- description: Delay between end of data sent and rts signal in milliseconds.
It corresponds to the delay after sending data and actual release
of the line.
default: 0
maximum: 100
- description: Delay between rts signal and beginning of data sent in
milliseconds. It corresponds to the delay before sending data.
default: 0
maximum: 100
- description: Delay between end of data sent and rts signal in milliseconds.
It corresponds to the delay after sending data and actual release
of the line.
default: 0
maximum: 100
rs485-rts-active-high:
description: drive RTS high when sending (this is the default).
Documentation/devicetree/bindings/sound/mt6359.yaml
+5 -5
View File
@@ -23,8 +23,8 @@ properties:
Indicates how many data pins are used to transmit two channels of PDM
signal. 0 means two wires, 1 means one wire. Default value is 0.
enum:
- 0 # one wire
- 1 # two wires
- 0 # two wires
- 1 # one wire
mediatek,mic-type-0:
$ref: /schemas/types.yaml#/definitions/uint32
@@ -53,9 +53,9 @@ additionalProperties: false
examples:
- |
mt6359codec: mt6359codec {
mediatek,dmic-mode = <0>;
mediatek,mic-type-0 = <2>;
mt6359codec: audio-codec {
mediatek,dmic-mode = <0>;
mediatek,mic-type-0 = <2>;
};
...
Documentation/devicetree/bindings/vendor-prefixes.yaml
+2
View File
@@ -923,6 +923,8 @@ patternProperties:
description: National Semiconductor
"^nec,.*":
description: NEC LCD Technologies, Ltd.
"^neofidelity,.*":
description: Neofidelity Inc.
"^neonode,.*":
description: Neonode Inc.
"^netgear,.*":
Documentation/filesystems/mount_api.rst
+2 -1
View File
@@ -766,7 +766,8 @@ process the parameters it is given.
* ::
bool fs_validate_description(const struct fs_parameter_description *desc);
bool fs_validate_description(const char *name,
const struct fs_parameter_description *desc);
This performs some validation checks on a parameter description. It
returns true if the description is good and false if it is not. It will
Documentation/locking/seqlock.rst
+1 -1
View File
@@ -153,7 +153,7 @@ Use seqcount_latch_t when the write side sections cannot be protected
from interruption by readers. This is typically the case when the read
side can be invoked from NMI handlers.
Check `raw_write_seqcount_latch()` for more information.
Check `write_seqcount_latch()` for more information.
.. _seqlock_t:
Documentation/networking/j1939.rst
+1 -1
View File
@@ -121,7 +121,7 @@ format, the Group Extension is set in the PS-field.
On the other hand, when using PDU1 format, the PS-field contains a so-called
Destination Address, which is _not_ part of the PGN. When communicating a PGN
from user space to kernel (or vice versa) and PDU2 format is used, the PS-field
from user space to kernel (or vice versa) and PDU1 format is used, the PS-field
of the PGN shall be set to zero. The Destination Address shall be set
elsewhere.
Makefile
+1 -1
View File
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 6
SUBLEVEL = 63
SUBLEVEL = 65
EXTRAVERSION =
NAME = Pinguïn Aangedreven
arch/arc/kernel/devtree.c
+1 -1
View File
@@ -62,7 +62,7 @@ const struct machine_desc * __init setup_machine_fdt(void *dt)
const struct machine_desc *mdesc;
unsigned long dt_root;
if (!early_init_dt_scan(dt))
if (!early_init_dt_scan(dt, __pa(dt)))
return NULL;
mdesc = of_flat_dt_match_machine(NULL, arch_get_next_mach);
arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts
+2 -2
View File
@@ -280,8 +280,8 @@
reg_dcdc5: dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1425000>;
regulator-max-microvolt = <1575000>;
regulator-min-microvolt = <1450000>;
regulator-max-microvolt = <1550000>;
regulator-name = "vcc-dram";
};
arch/arm/boot/dts/microchip/sam9x60.dtsi
+12
View File
@@ -186,6 +186,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -384,6 +385,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -433,6 +435,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -590,6 +593,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -639,6 +643,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -688,6 +693,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -737,6 +743,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -805,6 +812,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -873,6 +881,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -941,6 +950,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -1064,6 +1074,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
@@ -1113,6 +1124,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
clock-names = "usart";
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
atmel,use-dma-rx;
atmel,use-dma-tx;
atmel,fifo-size = <16>;
arch/arm/boot/dts/ti/omap/omap36xx.dtsi
+1
View File
@@ -72,6 +72,7 @@
<1375000 1375000 1375000>;
/* only on am/dm37x with speed-binned bit set */
opp-supported-hw = <0xffffffff 2>;
turbo-mode;
};
};
arch/arm/kernel/devtree.c
+1 -1
View File
@@ -201,7 +201,7 @@ const struct machine_desc * __init setup_machine_fdt(void *dt_virt)
mdesc_best = &__mach_desc_GENERIC_DT;
if (!dt_virt || !early_init_dt_verify(dt_virt))
if (!dt_virt || !early_init_dt_verify(dt_virt, __pa(dt_virt)))
return NULL;
mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
arch/arm/kernel/entry-armv.S
+8
View File
@@ -25,6 +25,7 @@
#include <asm/tls.h>
#include <asm/system_info.h>
#include <asm/uaccess-asm.h>
#include <asm/kasan_def.h>
#include "entry-header.S"
#include <asm/probes.h>
@@ -555,6 +556,13 @@ ENTRY(__switch_to)
@ entries covering the vmalloc region.
@
ldr r2, [ip]
#ifdef CONFIG_KASAN_VMALLOC
@ Also dummy read from the KASAN shadow memory for the new stack if we
@ are using KASAN
mov_l r2, KASAN_SHADOW_OFFSET
add r2, r2, ip, lsr #KASAN_SHADOW_SCALE_SHIFT
ldr r2, [r2]
#endif
#endif
@ When CONFIG_THREAD_INFO_IN_TASK=n, the update of SP itself is what
arch/arm/kernel/head.S
+4
View File
@@ -411,7 +411,11 @@ ENTRY(secondary_startup)
/*
* Use the page tables supplied from __cpu_up.
*/
#ifdef CONFIG_XIP_KERNEL
ldr r3, =(secondary_data + PLAT_PHYS_OFFSET - PAGE_OFFSET)
#else
adr_l r3, secondary_data
#endif
mov_l r12, __secondary_switched
ldrd r4, r5, [r3, #0] @ get secondary_data.pgdir
ARM_BE8(eor r4, r4, r5) @ Swap r5 and r4 in BE:
arch/arm/kernel/psci_smp.c
+7
View File
@@ -45,8 +45,15 @@ extern void secondary_startup(void);
static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
if (psci_ops.cpu_on)
#ifdef CONFIG_XIP_KERNEL
return psci_ops.cpu_on(cpu_logical_map(cpu),
((phys_addr_t)(&secondary_startup)
- XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
+ CONFIG_XIP_PHYS_ADDR));
#else
return psci_ops.cpu_on(cpu_logical_map(cpu),
virt_to_idmap(&secondary_startup));
#endif
return -ENODEV;
}
arch/arm/mm/idmap.c
+7
View File
@@ -84,8 +84,15 @@ static void identity_mapping_add(pgd_t *pgd, const char *text_start,
unsigned long addr, end;
unsigned long next;
#ifdef CONFIG_XIP_KERNEL
addr = (phys_addr_t)(text_start) - XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
+ CONFIG_XIP_PHYS_ADDR;
end = (phys_addr_t)(text_end) - XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
+ CONFIG_XIP_PHYS_ADDR;
#else
addr = virt_to_idmap(text_start);
end = virt_to_idmap(text_end);
#endif
pr_info("Setting up static identity map for 0x%lx - 0x%lx\n", addr, end);
prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
arch/arm/mm/ioremap.c
+30 -5
View File
@@ -23,6 +23,7 @@
*/
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kasan.h>
#include <linux/mm.h>
#include <linux/vmalloc.h>
#include <linux/io.h>
@@ -115,16 +116,40 @@ int ioremap_page(unsigned long virt, unsigned long phys,
}
EXPORT_SYMBOL(ioremap_page);
#ifdef CONFIG_KASAN
static unsigned long arm_kasan_mem_to_shadow(unsigned long addr)
{
return (unsigned long)kasan_mem_to_shadow((void *)addr);
}
#else
static unsigned long arm_kasan_mem_to_shadow(unsigned long addr)
{
return 0;
}
#endif
static void memcpy_pgd(struct mm_struct *mm, unsigned long start,
unsigned long end)
{
end = ALIGN(end, PGDIR_SIZE);
memcpy(pgd_offset(mm, start), pgd_offset_k(start),
sizeof(pgd_t) * (pgd_index(end) - pgd_index(start)));
}
void __check_vmalloc_seq(struct mm_struct *mm)
{
int seq;
do {
seq = atomic_read(&init_mm.context.vmalloc_seq);
memcpy(pgd_offset(mm, VMALLOC_START),
pgd_offset_k(VMALLOC_START),
sizeof(pgd_t) * (pgd_index(VMALLOC_END) -
pgd_index(VMALLOC_START)));
seq = atomic_read_acquire(&init_mm.context.vmalloc_seq);
memcpy_pgd(mm, VMALLOC_START, VMALLOC_END);
if (IS_ENABLED(CONFIG_KASAN_VMALLOC)) {
unsigned long start =
arm_kasan_mem_to_shadow(VMALLOC_START);
unsigned long end =
arm_kasan_mem_to_shadow(VMALLOC_END);
memcpy_pgd(mm, start, end);
}
/*
* Use a store-release so that other CPUs that observe the
* counter's new value are guaranteed to see the results of the
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+3
View File
@@ -202,6 +202,9 @@
interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */
vdd-supply = <&reg_dldo1>;
vddio-supply = <&reg_dldo1>;
mount-matrix = "0", "1", "0",
"-1", "0", "0",
"0", "0", "1";
};
};
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+1 -1
View File
@@ -145,7 +145,7 @@
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "+V3.3_SD";
startup-delay-us = <2000>;
startup-delay-us = <20000>;
};
reserved-memory {
arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+1 -1
View File
@@ -134,7 +134,7 @@
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "+V3.3_SD";
startup-delay-us = <2000>;
startup-delay-us = <20000>;
};
reserved-memory {
arch/arm64/boot/dts/mediatek/mt6357.dtsi
+5
View File
@@ -10,6 +10,11 @@
mt6357_pmic: pmic {
compatible = "mediatek,mt6357";
pmic_adc: adc {
compatible = "mediatek,mt6357-auxadc";
#io-channel-cells = <1>;
};
regulators {
mt6357_vproc_reg: buck-vproc {
regulator-name = "vproc";
arch/arm64/boot/dts/mediatek/mt6358.dtsi
+7 -2
View File
@@ -12,12 +12,17 @@
interrupts = <182 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
mt6358codec: mt6358codec {
pmic_adc: adc {
compatible = "mediatek,mt6358-auxadc";
#io-channel-cells = <1>;
};
mt6358codec: audio-codec {
compatible = "mediatek,mt6358-sound";
mediatek,dmic-mode = <0>; /* two-wires */
};
mt6358regulator: mt6358regulator {
mt6358regulator: regulators {
compatible = "mediatek,mt6358-regulator";
mt6358_vdram1_reg: buck_vdram1 {
arch/arm64/boot/dts/mediatek/mt6359.dtsi
+5
View File
@@ -9,6 +9,11 @@
interrupt-controller;
#interrupt-cells = <2>;
pmic_adc: adc {
compatible = "mediatek,mt6359-auxadc";
#io-channel-cells = <1>;
};
mt6359codec: mt6359codec {
};
arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi
+8
View File
@@ -43,6 +43,14 @@
interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
reg = <0x2c>;
hid-descr-addr = <0x0020>;
/*
* The trackpad needs a post-power-on delay of 100ms,
* but at time of writing, the power supply for it on
* this board is always on. The delay is therefore not
* added to avoid impacting the readiness of the
* trackpad.
*/
vdd-supply = <&mt6397_vgp6_reg>;
wakeup-source;
};
};
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts
+3
View File
@@ -30,3 +30,6 @@
};
};
&i2c2 {
i2c-scl-internal-delay-ns = <4100>;
};
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts
+2
View File
@@ -17,6 +17,8 @@
};
&i2c2 {
i2c-scl-internal-delay-ns = <25000>;
trackpad@2c {
compatible = "hid-over-i2c";
reg = <0x2c>;
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts
+3
View File
@@ -31,3 +31,6 @@
qcom,ath10k-calibration-variant = "GO_DAMU";
};
&i2c2 {
i2c-scl-internal-delay-ns = <20000>;
};
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi
+3
View File
@@ -25,3 +25,6 @@
};
};
&i2c2 {
i2c-scl-internal-delay-ns = <21500>;
};
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi
+18 -12
View File
@@ -8,28 +8,32 @@
#include <arm/cros-ec-keyboard.dtsi>
/ {
pp1200_mipibrdg: pp1200-mipibrdg {
pp1000_mipibrdg: pp1000-mipibrdg {
compatible = "regulator-fixed";
regulator-name = "pp1200_mipibrdg";
regulator-name = "pp1000_mipibrdg";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
pinctrl-names = "default";
pinctrl-0 = <&pp1200_mipibrdg_en>;
pinctrl-0 = <&pp1000_mipibrdg_en>;
enable-active-high;
regulator-boot-on;
gpio = <&pio 54 GPIO_ACTIVE_HIGH>;
vin-supply = <&pp1800_alw>;
};
pp1800_mipibrdg: pp1800-mipibrdg {
compatible = "regulator-fixed";
regulator-name = "pp1800_mipibrdg";
pinctrl-names = "default";
pinctrl-0 = <&pp1800_lcd_en>;
pinctrl-0 = <&pp1800_mipibrdg_en>;
enable-active-high;
regulator-boot-on;
gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
vin-supply = <&pp1800_alw>;
};
pp3300_panel: pp3300-panel {
@@ -44,18 +48,20 @@
regulator-boot-on;
gpio = <&pio 35 GPIO_ACTIVE_HIGH>;
vin-supply = <&pp3300_alw>;
};
vddio_mipibrdg: vddio-mipibrdg {
pp3300_mipibrdg: pp3300-mipibrdg {
compatible = "regulator-fixed";
regulator-name = "vddio_mipibrdg";
regulator-name = "pp3300_mipibrdg";
pinctrl-names = "default";
pinctrl-0 = <&vddio_mipibrdg_en>;
pinctrl-0 = <&pp3300_mipibrdg_en>;
enable-active-high;
regulator-boot-on;
gpio = <&pio 37 GPIO_ACTIVE_HIGH>;
vin-supply = <&pp3300_alw>;
};
volume_buttons: volume-buttons {
@@ -152,9 +158,9 @@
panel_flags = <1>;
enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
vdd10-supply = <&pp1200_mipibrdg>;
vdd10-supply = <&pp1000_mipibrdg>;
vdd18-supply = <&pp1800_mipibrdg>;
vdd33-supply = <&vddio_mipibrdg>;
vdd33-supply = <&pp3300_mipibrdg>;
ports {
#address-cells = <1>;
@@ -397,14 +403,14 @@
"",
"";
pp1200_mipibrdg_en: pp1200-mipibrdg-en {
pp1000_mipibrdg_en: pp1000-mipibrdg-en {
pins1 {
pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
output-low;
};
};
pp1800_lcd_en: pp1800-lcd-en {
pp1800_mipibrdg_en: pp1800-mipibrdg-en {
pins1 {
pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
output-low;
@@ -466,7 +472,7 @@
};
};
vddio_mipibrdg_en: vddio-mipibrdg-en {
pp3300_mipibrdg_en: pp3300-mipibrdg-en {
pins1 {
pinmux = <PINMUX_GPIO37__FUNC_GPIO37>;
output-low;
arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
+2 -2
View File
@@ -105,9 +105,9 @@
clock-frequency = <400000>;
vbus-supply = <&mt6358_vcn18_reg>;
eeprom@54 {
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x54>;
reg = <0x50>;
pagesize = <32>;
vcc-supply = <&mt6358_vcn18_reg>;
};
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
+2 -2
View File
@@ -80,9 +80,9 @@
clock-frequency = <400000>;
vbus-supply = <&mt6358_vcn18_reg>;
eeprom@54 {
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x54>;
reg = <0x50>;
pagesize = <32>;
vcc-supply = <&mt6358_vcn18_reg>;
};
arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
+2 -2
View File
@@ -89,9 +89,9 @@
clock-frequency = <400000>;
vbus-supply = <&mt6358_vcn18_reg>;
eeprom@54 {
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x54>;
reg = <0x50>;
pagesize = <32>;
vcc-supply = <&mt6358_vcn18_reg>;
};
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+1 -1
View File
@@ -1296,6 +1296,7 @@
vusb33-supply = <&mt6359_vusb_ldo_reg>;
vbus-supply = <&usb_vbus>;
mediatek,u3p-dis-msk = <1>;
};
&xhci2 {
@@ -1312,7 +1313,6 @@
usb2-lpm-disable;
vusb33-supply = <&mt6359_vusb_ldo_reg>;
vbus-supply = <&usb_vbus>;
mediatek,u3p-dis-msk = <1>;
};
#include <arm/cros-ec-keyboard.dtsi>
arch/arm64/boot/dts/mediatek/mt8195.dtsi
+1 -3
View File
@@ -487,7 +487,7 @@
};
infracfg_ao: syscon@10001000 {
compatible = "mediatek,mt8195-infracfg_ao", "syscon", "simple-mfd";
compatible = "mediatek,mt8195-infracfg_ao", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
@@ -2845,11 +2845,9 @@
mutex1: mutex@1c101000 {
compatible = "mediatek,mt8195-disp-mutex";
reg = <0 0x1c101000 0 0x1000>;
reg-names = "vdo1_mutex";
interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
clocks = <&vdosys1 CLK_VDO1_DISP_MUTEX>;
clock-names = "vdo1_mutex";
mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>;
mediatek,gce-events = <CMDQ_EVENT_VDO1_STREAM_DONE_ENG_0>;
};
arch/arm64/boot/dts/qcom/sc8180x.dtsi
+1 -1
View File
@@ -3618,7 +3618,7 @@
};
cpufreq_hw: cpufreq@18323000 {
compatible = "qcom,cpufreq-hw";
compatible = "qcom,sc8180x-cpufreq-hw", "qcom,cpufreq-hw";
reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>;
reg-names = "freq-domain0", "freq-domain1";
arch/arm64/boot/dts/qcom/sm6350.dtsi
+7 -7
View File
@@ -1351,43 +1351,43 @@
opp-850000000 {
opp-hz = /bits/ 64 <850000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
opp-supported-hw = <0x02>;
opp-supported-hw = <0x03>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
opp-supported-hw = <0x04>;
opp-supported-hw = <0x07>;
};
opp-650000000 {
opp-hz = /bits/ 64 <650000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
opp-supported-hw = <0x08>;
opp-supported-hw = <0x0f>;
};
opp-565000000 {
opp-hz = /bits/ 64 <565000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
opp-supported-hw = <0x10>;
opp-supported-hw = <0x1f>;
};
opp-430000000 {
opp-hz = /bits/ 64 <430000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
opp-supported-hw = <0xff>;
opp-supported-hw = <0x1f>;
};
opp-355000000 {
opp-hz = /bits/ 64 <355000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
opp-supported-hw = <0xff>;
opp-supported-hw = <0x1f>;
};
opp-253000000 {
opp-hz = /bits/ 64 <253000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
opp-supported-hw = <0xff>;
opp-supported-hw = <0x1f>;
};
};
};
arch/arm64/boot/dts/renesas/hihope-rev2.dtsi
-3
View File
@@ -69,9 +69,6 @@
status = "okay";
/* Single DAI */
#sound-dai-cells = <0>;
rsnd_port: port {
rsnd_endpoint: endpoint {
remote-endpoint = <&dw_hdmi0_snd_in>;
arch/arm64/boot/dts/renesas/hihope-rev4.dtsi
-3
View File
@@ -84,9 +84,6 @@
pinctrl-names = "default";
status = "okay";
/* Single DAI */
#sound-dai-cells = <0>;
/* audio_clkout0/1/2/3 */
#clock-cells = <1>;
clock-frequency = <12288000 11289600>;
arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
+1 -1
View File
@@ -34,7 +34,7 @@
sound {
compatible = "audio-graph-card";
label = "rockchip,es8388-codec";
label = "rockchip,es8388";
widgets = "Microphone", "Mic Jack",
"Headphone", "Headphones";
routing = "LINPUT2", "Mic Jack",
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+1 -1
View File
@@ -134,7 +134,7 @@
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "+V3.3_SD";
startup-delay-us = <2000>;
startup-delay-us = <20000>;
};
reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc {
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+1 -1
View File
@@ -192,7 +192,7 @@
};
};
&main_pmx1 {
&main_pmx2 {
main_usbss0_pins_default: main-usbss0-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+32 -14
View File
@@ -395,7 +395,7 @@
/* TIMERIO pad input CTRLMMR_TIMER*_CTRL registers */
main_timerio_input: pinctrl@104200 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
reg = <0x0 0x104200 0x0 0x50>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
@@ -404,7 +404,7 @@
/* TIMERIO pad output CTCTRLMMR_TIMERIO*_CTRL registers */
main_timerio_output: pinctrl@104280 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
reg = <0x0 0x104280 0x0 0x20>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
@@ -412,7 +412,7 @@
};
main_pmx0: pinctrl@11c000 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
/* Proxy 0 addressing */
reg = <0x00 0x11c000 0x00 0x10c>;
#pinctrl-cells = <1>;
@@ -420,10 +420,28 @@
pinctrl-single,function-mask = <0xffffffff>;
};
main_pmx1: pinctrl@11c11c {
compatible = "pinctrl-single";
main_pmx1: pinctrl@11c110 {
compatible = "ti,j7200-padconf", "pinctrl-single";
/* Proxy 0 addressing */
reg = <0x00 0x11c11c 0x00 0xc>;
reg = <0x00 0x11c110 0x00 0x004>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
main_pmx2: pinctrl@11c11c {
compatible = "ti,j7200-padconf", "pinctrl-single";
/* Proxy 0 addressing */
reg = <0x00 0x11c11c 0x00 0x00c>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
main_pmx3: pinctrl@11c164 {
compatible = "ti,j7200-padconf", "pinctrl-single";
/* Proxy 0 addressing */
reg = <0x00 0x11c164 0x00 0x008>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
@@ -897,7 +915,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 266 1>;
clocks = <&k3_clks 266 4>;
status = "disabled";
};
@@ -908,7 +926,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 267 1>;
clocks = <&k3_clks 267 4>;
status = "disabled";
};
@@ -919,7 +937,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 268 1>;
clocks = <&k3_clks 268 4>;
status = "disabled";
};
@@ -930,7 +948,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 269 1>;
clocks = <&k3_clks 269 4>;
status = "disabled";
};
@@ -941,7 +959,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 270 1>;
clocks = <&k3_clks 270 2>;
status = "disabled";
};
@@ -952,7 +970,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 271 1>;
clocks = <&k3_clks 271 4>;
status = "disabled";
};
@@ -963,7 +981,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 272 1>;
clocks = <&k3_clks 272 4>;
status = "disabled";
};
@@ -974,7 +992,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 273 1>;
clocks = <&k3_clks 273 4>;
status = "disabled";
};
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+9 -9
View File
@@ -185,7 +185,7 @@
/* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */
mcu_timerio_input: pinctrl@40f04200 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
reg = <0x0 0x40f04200 0x0 0x28>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
@@ -195,7 +195,7 @@
/* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */
mcu_timerio_output: pinctrl@40f04280 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
reg = <0x0 0x40f04280 0x0 0x28>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
@@ -204,7 +204,7 @@
};
wkup_pmx0: pinctrl@4301c000 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
/* Proxy 0 addressing */
reg = <0x00 0x4301c000 0x00 0x34>;
#pinctrl-cells = <1>;
@@ -213,7 +213,7 @@
};
wkup_pmx1: pinctrl@4301c038 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
/* Proxy 0 addressing */
reg = <0x00 0x4301c038 0x00 0x8>;
#pinctrl-cells = <1>;
@@ -222,7 +222,7 @@
};
wkup_pmx2: pinctrl@4301c068 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
/* Proxy 0 addressing */
reg = <0x00 0x4301c068 0x00 0xec>;
#pinctrl-cells = <1>;
@@ -231,7 +231,7 @@
};
wkup_pmx3: pinctrl@4301c174 {
compatible = "pinctrl-single";
compatible = "ti,j7200-padconf", "pinctrl-single";
/* Proxy 0 addressing */
reg = <0x00 0x4301c174 0x00 0x20>;
#pinctrl-cells = <1>;
@@ -481,7 +481,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 274 0>;
clocks = <&k3_clks 274 4>;
status = "disabled";
};
@@ -492,7 +492,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 275 0>;
clocks = <&k3_clks 275 4>;
status = "disabled";
};
@@ -503,7 +503,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 276 0>;
clocks = <&k3_clks 276 2>;
status = "disabled";
};
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+3 -3
View File
@@ -637,7 +637,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 274 0>;
clocks = <&k3_clks 274 1>;
status = "disabled";
};
@@ -648,7 +648,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 275 0>;
clocks = <&k3_clks 275 1>;
status = "disabled";
};
@@ -659,7 +659,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 276 0>;
clocks = <&k3_clks 276 1>;
status = "disabled";
};
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+8 -8
View File
@@ -1569,7 +1569,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 339 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 339 1>;
clocks = <&k3_clks 339 2>;
status = "disabled";
};
@@ -1580,7 +1580,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 340 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 340 1>;
clocks = <&k3_clks 340 2>;
status = "disabled";
};
@@ -1591,7 +1591,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 341 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 341 1>;
clocks = <&k3_clks 341 2>;
status = "disabled";
};
@@ -1602,7 +1602,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 342 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 342 1>;
clocks = <&k3_clks 342 2>;
status = "disabled";
};
@@ -1613,7 +1613,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 343 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 343 1>;
clocks = <&k3_clks 343 2>;
status = "disabled";
};
@@ -1624,7 +1624,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 344 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 344 1>;
clocks = <&k3_clks 344 2>;
status = "disabled";
};
@@ -1635,7 +1635,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 345 1>;
clocks = <&k3_clks 345 2>;
status = "disabled";
};
@@ -1646,7 +1646,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 346 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 346 1>;
clocks = <&k3_clks 346 2>;
status = "disabled";
};
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+3 -3
View File
@@ -416,7 +416,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 347 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 347 0>;
clocks = <&k3_clks 347 2>;
status = "disabled";
};
@@ -427,7 +427,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 348 0>;
clocks = <&k3_clks 348 2>;
status = "disabled";
};
@@ -438,7 +438,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 349 0>;
clocks = <&k3_clks 349 2>;
status = "disabled";
};
arch/arm64/include/asm/insn.h
+1
View File
@@ -347,6 +347,7 @@ __AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
__AARCH64_INSN_FUNCS(exclusive, 0x3F800000, 0x08000000)
__AARCH64_INSN_FUNCS(load_ex, 0x3F400000, 0x08400000)
__AARCH64_INSN_FUNCS(store_ex, 0x3F400000, 0x08000000)
__AARCH64_INSN_FUNCS(mops, 0x3B200C00, 0x19000400)
__AARCH64_INSN_FUNCS(stp, 0x7FC00000, 0x29000000)
__AARCH64_INSN_FUNCS(ldp, 0x7FC00000, 0x29400000)
__AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000)
arch/arm64/include/asm/kvm_host.h
-2
View File
@@ -72,8 +72,6 @@ enum kvm_mode kvm_get_mode(void);
static inline enum kvm_mode kvm_get_mode(void) { return KVM_MODE_NONE; };
#endif
DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
extern unsigned int __ro_after_init kvm_sve_max_vl;
int __init kvm_arm_init_sve(void);
arch/arm64/kernel/probes/decode-insn.c
+5 -2
View File
@@ -58,10 +58,13 @@ static bool __kprobes aarch64_insn_is_steppable(u32 insn)
* Instructions which load PC relative literals are not going to work
* when executed from an XOL slot. Instructions doing an exclusive
* load/store are not going to complete successfully when single-step
* exception handling happens in the middle of the sequence.
* exception handling happens in the middle of the sequence. Memory
* copy/set instructions require that all three instructions be placed
* consecutively in memory.
*/
if (aarch64_insn_uses_literal(insn) ||
aarch64_insn_is_exclusive(insn))
aarch64_insn_is_exclusive(insn) ||
aarch64_insn_is_mops(insn))
return false;
return true;
arch/arm64/kernel/process.c
+1 -1
View File
@@ -429,7 +429,7 @@ static void tls_thread_switch(struct task_struct *next)
if (is_compat_thread(task_thread_info(next)))
write_sysreg(next->thread.uw.tp_value, tpidrro_el0);
else if (!arm64_kernel_unmapped_at_el0())
else
write_sysreg(0, tpidrro_el0);
write_sysreg(*task_user_tls(next), tpidr_el0);
arch/arm64/kernel/setup.c
+5 -1
View File
@@ -190,7 +190,11 @@ static void __init setup_machine_fdt(phys_addr_t dt_phys)
if (dt_virt)
memblock_reserve(dt_phys, size);
if (!dt_virt || !early_init_dt_scan(dt_virt)) {
/*
* dt_virt is a fixmap address, hence __pa(dt_virt) can't be used.
* Pass dt_phys directly.
*/
if (!early_init_dt_scan(dt_virt, dt_phys)) {
pr_crit("\n"
"Error: invalid device tree blob at physical address %pa (virtual address 0x%px)\n"
"The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
arch/arm64/kernel/vmlinux.lds.S
+3 -3
View File
@@ -285,6 +285,9 @@ SECTIONS
__initdata_end = .;
__init_end = .;
.data.rel.ro : { *(.data.rel.ro) }
ASSERT(SIZEOF(.data.rel.ro) == 0, "Unexpected RELRO detected!")
_data = .;
_sdata = .;
RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_ALIGN)
@@ -336,9 +339,6 @@ SECTIONS
*(.plt) *(.plt.*) *(.iplt) *(.igot .igot.plt)
}
ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!")
.data.rel.ro : { *(.data.rel.ro) }
ASSERT(SIZEOF(.data.rel.ro) == 0, "Unexpected RELRO detected!")
}
#include "image-vars.h"
arch/arm64/kvm/arch_timer.c
+1 -2
View File
@@ -206,8 +206,7 @@ void get_timer_map(struct kvm_vcpu *vcpu, struct timer_map *map)
static inline bool userspace_irqchip(struct kvm *kvm)
{
return static_branch_unlikely(&userspace_irqchip_in_use) &&
unlikely(!irqchip_in_kernel(kvm));
return unlikely(!irqchip_in_kernel(kvm));
}
static void soft_timer_start(struct hrtimer *hrt, u64 ns)
arch/arm64/kvm/arm.c
+3 -15
View File
@@ -57,7 +57,6 @@ DECLARE_KVM_NVHE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
static bool vgic_present, kvm_arm_initialised;
static DEFINE_PER_CPU(unsigned char, kvm_hyp_initialized);
DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
bool is_kvm_arm_initialised(void)
{
@@ -401,9 +400,6 @@ void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
{
if (vcpu_has_run_once(vcpu) && unlikely(!irqchip_in_kernel(vcpu->kvm)))
static_branch_dec(&userspace_irqchip_in_use);
kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
kvm_timer_vcpu_terminate(vcpu);
kvm_pmu_vcpu_destroy(vcpu);
@@ -627,14 +623,6 @@ int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)
return ret;
}
if (!irqchip_in_kernel(kvm)) {
/*
* Tell the rest of the code that there are userspace irqchip
* VMs in the wild.
*/
static_branch_inc(&userspace_irqchip_in_use);
}
/*
* Initialize traps for protected VMs.
* NOTE: Move to run in EL2 directly, rather than via a hypercall, once
@@ -856,7 +844,7 @@ static bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu, int *ret)
* state gets updated in kvm_timer_update_run and
* kvm_pmu_update_run below).
*/
if (static_branch_unlikely(&userspace_irqchip_in_use)) {
if (unlikely(!irqchip_in_kernel(vcpu->kvm))) {
if (kvm_timer_should_notify_user(vcpu) ||
kvm_pmu_should_notify_user(vcpu)) {
*ret = -EINTR;
@@ -975,7 +963,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
vcpu->mode = OUTSIDE_GUEST_MODE;
isb(); /* Ensure work in x_flush_hwstate is committed */
kvm_pmu_sync_hwstate(vcpu);
if (static_branch_unlikely(&userspace_irqchip_in_use))
if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
kvm_timer_sync_user(vcpu);
kvm_vgic_sync_hwstate(vcpu);
local_irq_enable();
@@ -1021,7 +1009,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
* we don't want vtimer interrupts to race with syncing the
* timer virtual interrupt state.
*/
if (static_branch_unlikely(&userspace_irqchip_in_use))
if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
kvm_timer_sync_user(vcpu);
kvm_arch_vcpu_ctxsync_fp(vcpu);
arch/arm64/kvm/pmu-emul.c
-1
View File
@@ -326,7 +326,6 @@ static u64 kvm_pmu_overflow_status(struct kvm_vcpu *vcpu)
if ((__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) {
reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);
reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);
reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1);
}
arch/arm64/kvm/vgic/vgic-its.c
+17 -15
View File
@@ -855,6 +855,9 @@ static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,
ite = find_ite(its, device_id, event_id);
if (ite && its_is_collection_mapped(ite->collection)) {
struct its_device *device = find_its_device(its, device_id);
int ite_esz = vgic_its_get_abi(its)->ite_esz;
gpa_t gpa = device->itt_addr + ite->event_id * ite_esz;
/*
* Though the spec talks about removing the pending state, we
* don't bother here since we clear the ITTE anyway and the
@@ -863,7 +866,8 @@ static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,
vgic_its_invalidate_cache(kvm);
its_free_ite(kvm, ite);
return 0;
return vgic_its_write_entry_lock(its, gpa, 0, ite_esz);
}
return E_ITS_DISCARD_UNMAPPED_INTERRUPT;
@@ -1211,9 +1215,11 @@ static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,
bool valid = its_cmd_get_validbit(its_cmd);
u8 num_eventid_bits = its_cmd_get_size(its_cmd);
gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);
int dte_esz = vgic_its_get_abi(its)->dte_esz;
struct its_device *device;
gpa_t gpa;
if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL))
if (!vgic_its_check_id(its, its->baser_device_table, device_id, &gpa))
return E_ITS_MAPD_DEVICE_OOR;
if (valid && num_eventid_bits > VITS_TYPER_IDBITS)
@@ -1234,7 +1240,7 @@ static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,
* is an error, so we are done in any case.
*/
if (!valid)
return 0;
return vgic_its_write_entry_lock(its, gpa, 0, dte_esz);
device = vgic_its_alloc_device(its, device_id, itt_addr,
num_eventid_bits);
@@ -2207,7 +2213,6 @@ static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz,
static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,
struct its_ite *ite, gpa_t gpa, int ite_esz)
{
struct kvm *kvm = its->dev->kvm;
u32 next_offset;
u64 val;
@@ -2216,7 +2221,8 @@ static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,
((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) |
ite->collection->collection_id;
val = cpu_to_le64(val);
return vgic_write_guest_lock(kvm, gpa, &val, ite_esz);
return vgic_its_write_entry_lock(its, gpa, val, ite_esz);
}
/**
@@ -2357,7 +2363,6 @@ static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev)
static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,
gpa_t ptr, int dte_esz)
{
struct kvm *kvm = its->dev->kvm;
u64 val, itt_addr_field;
u32 next_offset;
@@ -2368,7 +2373,8 @@ static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,
(itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) |
(dev->num_eventid_bits - 1));
val = cpu_to_le64(val);
return vgic_write_guest_lock(kvm, ptr, &val, dte_esz);
return vgic_its_write_entry_lock(its, ptr, val, dte_esz);
}
/**
@@ -2555,7 +2561,8 @@ static int vgic_its_save_cte(struct vgic_its *its,
((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) |
collection->collection_id);
val = cpu_to_le64(val);
return vgic_write_guest_lock(its->dev->kvm, gpa, &val, esz);
return vgic_its_write_entry_lock(its, gpa, val, esz);
}
/*
@@ -2571,8 +2578,7 @@ static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz)
u64 val;
int ret;
BUG_ON(esz > sizeof(val));
ret = kvm_read_guest_lock(kvm, gpa, &val, esz);
ret = vgic_its_read_entry_lock(its, gpa, &val, esz);
if (ret)
return ret;
val = le64_to_cpu(val);
@@ -2610,7 +2616,6 @@ static int vgic_its_save_collection_table(struct vgic_its *its)
u64 baser = its->baser_coll_table;
gpa_t gpa = GITS_BASER_ADDR_48_to_52(baser);
struct its_collection *collection;
u64 val;
size_t max_size, filled = 0;
int ret, cte_esz = abi->cte_esz;
@@ -2634,10 +2639,7 @@ static int vgic_its_save_collection_table(struct vgic_its *its)
* table is not fully filled, add a last dummy element
* with valid bit unset
*/
val = 0;
BUG_ON(cte_esz > sizeof(val));
ret = vgic_write_guest_lock(its->dev->kvm, gpa, &val, cte_esz);
return ret;
return vgic_its_write_entry_lock(its, gpa, 0, cte_esz);
}
/**
arch/arm64/kvm/vgic/vgic-mmio-v3.c
+6 -1
View File
@@ -555,6 +555,7 @@ static void vgic_mmio_write_invlpi(struct kvm_vcpu *vcpu,
unsigned long val)
{
struct vgic_irq *irq;
u32 intid;
/*
* If the guest wrote only to the upper 32bit part of the
@@ -566,9 +567,13 @@ static void vgic_mmio_write_invlpi(struct kvm_vcpu *vcpu,
if ((addr & 4) || !vgic_lpis_enabled(vcpu))
return;
intid = lower_32_bits(val);
if (intid < VGIC_MIN_LPI)
return;
vgic_set_rdist_busy(vcpu, true);
irq = vgic_get_irq(vcpu->kvm, NULL, lower_32_bits(val));
irq = vgic_get_irq(vcpu->kvm, NULL, intid);
if (irq) {
vgic_its_inv_lpi(vcpu->kvm, irq);
vgic_put_irq(vcpu->kvm, irq);
arch/arm64/kvm/vgic/vgic.h
+23
View File
@@ -145,6 +145,29 @@ static inline int vgic_write_guest_lock(struct kvm *kvm, gpa_t gpa,
return ret;
}
static inline int vgic_its_read_entry_lock(struct vgic_its *its, gpa_t eaddr,
u64 *eval, unsigned long esize)
{
struct kvm *kvm = its->dev->kvm;
if (KVM_BUG_ON(esize != sizeof(*eval), kvm))
return -EINVAL;
return kvm_read_guest_lock(kvm, eaddr, eval, esize);
}
static inline int vgic_its_write_entry_lock(struct vgic_its *its, gpa_t eaddr,
u64 eval, unsigned long esize)
{
struct kvm *kvm = its->dev->kvm;
if (KVM_BUG_ON(esize != sizeof(eval), kvm))
return -EINVAL;
return vgic_write_guest_lock(kvm, eaddr, &eval, esize);
}
/*
* This struct provides an intermediate representation of the fields contained
* in the GICH_VMCR and ICH_VMCR registers, such that code exporting the GIC
arch/arm64/net/bpf_jit_comp.c
+31 -16
View File
@@ -1816,6 +1816,12 @@ static void restore_args(struct jit_ctx *ctx, int args_off, int nregs)
}
}
static bool is_struct_ops_tramp(const struct bpf_tramp_links *fentry_links)
{
return fentry_links->nr_links == 1 &&
fentry_links->links[0]->link.type == BPF_LINK_TYPE_STRUCT_OPS;
}
/* Based on the x86's implementation of arch_prepare_bpf_trampoline().
*
* bpf prog and function entry before bpf trampoline hooked:
@@ -1845,6 +1851,7 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,
struct bpf_tramp_links *fmod_ret = &tlinks[BPF_TRAMP_MODIFY_RETURN];
bool save_ret;
__le32 **branches = NULL;
bool is_struct_ops = is_struct_ops_tramp(fentry);
/* trampoline stack layout:
* [ parent ip ]
@@ -1913,11 +1920,14 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,
*/
emit_bti(A64_BTI_JC, ctx);
/* frame for parent function */
emit(A64_PUSH(A64_FP, A64_R(9), A64_SP), ctx);
emit(A64_MOV(1, A64_FP, A64_SP), ctx);
/* x9 is not set for struct_ops */
if (!is_struct_ops) {
/* frame for parent function */
emit(A64_PUSH(A64_FP, A64_R(9), A64_SP), ctx);
emit(A64_MOV(1, A64_FP, A64_SP), ctx);
}
/* frame for patched function */
/* frame for patched function for tracing, or caller for struct_ops */
emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
emit(A64_MOV(1, A64_FP, A64_SP), ctx);
@@ -2003,19 +2013,24 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,
/* reset SP */
emit(A64_MOV(1, A64_SP, A64_FP), ctx);
/* pop frames */
emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
emit(A64_POP(A64_FP, A64_R(9), A64_SP), ctx);
if (flags & BPF_TRAMP_F_SKIP_FRAME) {
/* skip patched function, return to parent */
emit(A64_MOV(1, A64_LR, A64_R(9)), ctx);
emit(A64_RET(A64_R(9)), ctx);
if (is_struct_ops) {
emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
emit(A64_RET(A64_LR), ctx);
} else {
/* return to patched function */
emit(A64_MOV(1, A64_R(10), A64_LR), ctx);
emit(A64_MOV(1, A64_LR, A64_R(9)), ctx);
emit(A64_RET(A64_R(10)), ctx);
/* pop frames */
emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
emit(A64_POP(A64_FP, A64_R(9), A64_SP), ctx);
if (flags & BPF_TRAMP_F_SKIP_FRAME) {
/* skip patched function, return to parent */
emit(A64_MOV(1, A64_LR, A64_R(9)), ctx);
emit(A64_RET(A64_R(9)), ctx);
} else {
/* return to patched function */
emit(A64_MOV(1, A64_R(10), A64_LR), ctx);
emit(A64_MOV(1, A64_LR, A64_R(9)), ctx);
emit(A64_RET(A64_R(10)), ctx);
}
}
if (ctx->image)
arch/csky/kernel/setup.c
+2 -2
View File
@@ -124,9 +124,9 @@ asmlinkage __visible void __init csky_start(unsigned int unused,
pre_trap_init();
if (dtb_start == NULL)
early_init_dt_scan(__dtb_start);
early_init_dt_scan(__dtb_start, __pa(dtb_start));
else
early_init_dt_scan(dtb_start);
early_init_dt_scan(dtb_start, __pa(dtb_start));
start_kernel();
arch/loongarch/include/asm/page.h
+1 -4
View File
@@ -94,10 +94,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
extern int __virt_addr_valid(volatile void *kaddr);
#define virt_addr_valid(kaddr) __virt_addr_valid((volatile void *)(kaddr))
#define VM_DATA_DEFAULT_FLAGS \
(VM_READ | VM_WRITE | \
((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
#define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_TSK_EXEC
#include <asm-generic/memory_model.h>
#include <asm-generic/getorder.h>
arch/loongarch/kernel/setup.c
+1 -1
View File
@@ -304,7 +304,7 @@ static void __init fdt_setup(void)
if (!fdt_pointer || fdt_check_header(fdt_pointer))
return;
early_init_dt_scan(fdt_pointer);
early_init_dt_scan(fdt_pointer, __pa(fdt_pointer));
early_init_fdt_reserve_self();
max_low_pfn = PFN_PHYS(memblock_end_of_DRAM());
arch/loongarch/net/bpf_jit.c
+1 -1
View File
@@ -179,7 +179,7 @@ static void __build_epilogue(struct jit_ctx *ctx, bool is_tail_call)
if (!is_tail_call) {
/* Set return value */
move_reg(ctx, LOONGARCH_GPR_A0, regmap[BPF_REG_0]);
emit_insn(ctx, addiw, LOONGARCH_GPR_A0, regmap[BPF_REG_0], 0);
/* Return to the caller */
emit_insn(ctx, jirl, LOONGARCH_GPR_RA, LOONGARCH_GPR_ZERO, 0);
} else {
arch/loongarch/vdso/Makefile
+1 -1
View File
@@ -22,7 +22,7 @@ ccflags-vdso := \
cflags-vdso := $(ccflags-vdso) \
-isystem $(shell $(CC) -print-file-name=include) \
$(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \
-O2 -g -fno-strict-aliasing -fno-common -fno-builtin \
-std=gnu11 -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \
-fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \
$(call cc-option, -fno-asynchronous-unwind-tables) \
$(call cc-option, -fno-stack-protector)
arch/m68k/coldfire/device.c
+4 -4
View File
@@ -93,7 +93,7 @@ static struct platform_device mcf_uart = {
.dev.platform_data = mcf_uart_platform_data,
};
#if IS_ENABLED(CONFIG_FEC)
#ifdef MCFFEC_BASE0
#ifdef CONFIG_M5441x
#define FEC_NAME "enet-fec"
@@ -145,6 +145,7 @@ static struct platform_device mcf_fec0 = {
.platform_data = FEC_PDATA,
}
};
#endif /* MCFFEC_BASE0 */
#ifdef MCFFEC_BASE1
static struct resource mcf_fec1_resources[] = {
@@ -182,7 +183,6 @@ static struct platform_device mcf_fec1 = {
}
};
#endif /* MCFFEC_BASE1 */
#endif /* CONFIG_FEC */
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
/*
@@ -624,12 +624,12 @@ static struct platform_device mcf_flexcan0 = {
static struct platform_device *mcf_devices[] __initdata = {
&mcf_uart,
#if IS_ENABLED(CONFIG_FEC)
#ifdef MCFFEC_BASE0
&mcf_fec0,
#endif
#ifdef MCFFEC_BASE1
&mcf_fec1,
#endif
#endif
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
&mcf_qspi,
#endif
arch/m68k/include/asm/mcfgpio.h
+1 -1
View File
@@ -136,7 +136,7 @@ static inline void gpio_free(unsigned gpio)
* read-modify-write as well as those controlled by the EPORT and GPIO modules.
*/
#define MCFGPIO_SCR_START 40
#elif defined(CONFIGM5441x)
#elif defined(CONFIG_M5441x)
/* The m5441x EPORT doesn't have its own GPIO port, uses PORT C */
#define MCFGPIO_SCR_START 0
#else
arch/m68k/include/asm/mvme147hw.h
+2 -2
View File
@@ -93,8 +93,8 @@ struct pcc_regs {
#define M147_SCC_B_ADDR 0xfffe3000
#define M147_SCC_PCLK 5000000
#define MVME147_IRQ_SCSI_PORT (IRQ_USER+0x45)
#define MVME147_IRQ_SCSI_DMA (IRQ_USER+0x46)
#define MVME147_IRQ_SCSI_PORT (IRQ_USER + 5)
#define MVME147_IRQ_SCSI_DMA (IRQ_USER + 6)
/* SCC interrupts, for MVME147 */
arch/m68k/kernel/early_printk.c
+6 -3
View File
@@ -12,8 +12,9 @@
#include <linux/string.h>
#include <asm/setup.h>
extern void mvme16x_cons_write(struct console *co,
const char *str, unsigned count);
#include "../mvme147/mvme147.h"
#include "../mvme16x/mvme16x.h"
asmlinkage void __init debug_cons_nputs(const char *s, unsigned n);
@@ -22,7 +23,9 @@ static void __ref debug_cons_write(struct console *c,
{
#if !(defined(CONFIG_SUN3) || defined(CONFIG_M68000) || \
defined(CONFIG_COLDFIRE))
if (MACH_IS_MVME16x)
if (MACH_IS_MVME147)
mvme147_scc_write(c, s, n);
else if (MACH_IS_MVME16x)
mvme16x_cons_write(c, s, n);
else
debug_cons_nputs(s, n);
arch/m68k/mvme147/config.c
+30
View File
@@ -35,6 +35,7 @@
#include <asm/mvme147hw.h>
#include <asm/config.h>
#include "mvme147.h"
static void mvme147_get_model(char *model);
extern void mvme147_sched_init(void);
@@ -188,3 +189,32 @@ int mvme147_hwclk(int op, struct rtc_time *t)
}
return 0;
}
static void scc_delay(void)
{
__asm__ __volatile__ ("nop; nop;");
}
static void scc_write(char ch)
{
do {
scc_delay();
} while (!(in_8(M147_SCC_A_ADDR) & BIT(2)));
scc_delay();
out_8(M147_SCC_A_ADDR, 8);
scc_delay();
out_8(M147_SCC_A_ADDR, ch);
}
void mvme147_scc_write(struct console *co, const char *str, unsigned int count)
{
unsigned long flags;
local_irq_save(flags);
while (count--) {
if (*str == '\n')
scc_write('\r');
scc_write(*str++);
}
local_irq_restore(flags);
}
arch/m68k/mvme147/mvme147.h
+6
View File
@@ -0,0 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
struct console;
/* config.c */
void mvme147_scc_write(struct console *co, const char *str, unsigned int count);
arch/m68k/mvme16x/config.c
+2
View File
@@ -38,6 +38,8 @@
#include <asm/mvme16xhw.h>
#include <asm/config.h>
#include "mvme16x.h"
extern t_bdid mvme_bdid;
static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
arch/m68k/mvme16x/mvme16x.h
+6
View File
@@ -0,0 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
struct console;
/* config.c */
void mvme16x_cons_write(struct console *co, const char *str, unsigned count);
arch/microblaze/kernel/microblaze_ksyms.c
+10
View File
@@ -16,6 +16,7 @@
#include <asm/page.h>
#include <linux/ftrace.h>
#include <linux/uaccess.h>
#include <asm/xilinx_mb_manager.h>
#ifdef CONFIG_FUNCTION_TRACER
extern void _mcount(void);
@@ -46,3 +47,12 @@ extern void __udivsi3(void);
EXPORT_SYMBOL(__udivsi3);
extern void __umodsi3(void);
EXPORT_SYMBOL(__umodsi3);
#ifdef CONFIG_MB_MANAGER
extern void xmb_manager_register(uintptr_t phys_baseaddr, u32 cr_val,
void (*callback)(void *data),
void *priv, void (*reset_callback)(void *data));
EXPORT_SYMBOL(xmb_manager_register);
extern asmlinkage void xmb_inject_err(void);
EXPORT_SYMBOL(xmb_inject_err);
#endif
arch/microblaze/kernel/prom.c
+1 -1
View File
@@ -18,7 +18,7 @@ void __init early_init_devtree(void *params)
{
pr_debug(" -> early_init_devtree(%p)\n", params);
early_init_dt_scan(params);
early_init_dt_scan(params, __pa(params));
if (!strlen(boot_command_line))
strscpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
arch/mips/include/asm/switch_to.h
+1 -1
View File
@@ -97,7 +97,7 @@ do { \
} \
} while (0)
#else
# define __sanitize_fcr31(next)
# define __sanitize_fcr31(next) do { (void) (next); } while (0)
#endif
/*
arch/mips/kernel/prom.c
+1 -1
View File
@@ -39,7 +39,7 @@ char *mips_get_machine_name(void)
void __init __dt_setup_arch(void *bph)
{
if (!early_init_dt_scan(bph))
if (!early_init_dt_scan(bph, __pa(bph)))
return;
mips_set_machine_name(of_flat_dt_get_machine_name());
arch/mips/kernel/relocate.c
+1 -1
View File
@@ -337,7 +337,7 @@ void *__init relocate_kernel(void)
#if defined(CONFIG_USE_OF)
/* Deal with the device tree */
fdt = plat_get_fdt();
early_init_dt_scan(fdt);
early_init_dt_scan(fdt, __pa(fdt));
if (boot_command_line[0]) {
/* Boot command line was passed in device tree */
strscpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
arch/nios2/kernel/prom.c
+2 -2
View File
@@ -26,12 +26,12 @@ void __init early_init_devtree(void *params)
if (be32_to_cpup((__be32 *)CONFIG_NIOS2_DTB_PHYS_ADDR) ==
OF_DT_HEADER) {
params = (void *)CONFIG_NIOS2_DTB_PHYS_ADDR;
early_init_dt_scan(params);
early_init_dt_scan(params, __pa(params));
return;
}
#endif
if (be32_to_cpu((__be32) *dtb) == OF_DT_HEADER)
params = (void *)__dtb_start;
early_init_dt_scan(params);
early_init_dt_scan(params, __pa(params));
}
arch/openrisc/Kconfig
+3
View File
@@ -64,6 +64,9 @@ config STACKTRACE_SUPPORT
config LOCKDEP_SUPPORT
def_bool y
config FIX_EARLYCON_MEM
def_bool y
menu "Processor type and features"
choice
arch/openrisc/include/asm/fixmap.h
+5 -45
View File
@@ -26,59 +26,19 @@
#include <linux/bug.h>
#include <asm/page.h>
/*
* On OpenRISC we use these special fixed_addresses for doing ioremap
* early in the boot process before memory initialization is complete.
* This is used, in particular, by the early serial console code.
*
* It's not really 'fixmap', per se, but fits loosely into the same
* paradigm.
*/
enum fixed_addresses {
/*
* FIX_IOREMAP entries are useful for mapping physical address
* space before ioremap() is useable, e.g. really early in boot
* before kmalloc() is working.
*/
#define FIX_N_IOREMAPS 32
FIX_IOREMAP_BEGIN,
FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS - 1,
FIX_EARLYCON_MEM_BASE,
__end_of_fixed_addresses
};
#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
/* FIXADDR_BOTTOM might be a better name here... */
#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
#define FIXMAP_PAGE_IO PAGE_KERNEL_NOCACHE
#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT))
#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT)
extern void __set_fixmap(enum fixed_addresses idx,
phys_addr_t phys, pgprot_t flags);
/*
* 'index to address' translation. If anyone tries to use the idx
* directly without tranlation, we catch the bug with a NULL-deference
* kernel oops. Illegal ranges of incoming indices are caught too.
*/
static __always_inline unsigned long fix_to_virt(const unsigned int idx)
{
/*
* this branch gets completely eliminated after inlining,
* except when someone tries to use fixaddr indices in an
* illegal way. (such as mixing up address types or using
* out-of-range indices).
*
* If it doesn't get removed, the linker will complain
* loudly with a reasonably clear error message..
*/
if (idx >= __end_of_fixed_addresses)
BUG();
return __fix_to_virt(idx);
}
static inline unsigned long virt_to_fix(const unsigned long vaddr)
{
BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
return __virt_to_fix(vaddr);
}
#include <asm-generic/fixmap.h>
#endif
arch/openrisc/kernel/prom.c
+1 -1
View File
@@ -22,6 +22,6 @@
void __init early_init_devtree(void *params)
{
early_init_dt_scan(params);
early_init_dt_scan(params, __pa(params));
memblock_allow_resize();
}
arch/openrisc/mm/init.c
+37
View File
@@ -207,6 +207,43 @@ void __init mem_init(void)
return;
}
static int __init map_page(unsigned long va, phys_addr_t pa, pgprot_t prot)
{
p4d_t *p4d;
pud_t *pud;
pmd_t *pmd;
pte_t *pte;
p4d = p4d_offset(pgd_offset_k(va), va);
pud = pud_offset(p4d, va);
pmd = pmd_offset(pud, va);
pte = pte_alloc_kernel(pmd, va);
if (pte == NULL)
return -ENOMEM;
if (pgprot_val(prot))
set_pte_at(&init_mm, va, pte, pfn_pte(pa >> PAGE_SHIFT, prot));
else
pte_clear(&init_mm, va, pte);
local_flush_tlb_page(NULL, va);
return 0;
}
void __init __set_fixmap(enum fixed_addresses idx,
phys_addr_t phys, pgprot_t prot)
{
unsigned long address = __fix_to_virt(idx);
if (idx >= __end_of_fixed_addresses) {
BUG();
return;
}
map_page(address, phys, prot);
}
static const pgprot_t protection_map[16] = {
[VM_NONE] = PAGE_NONE,
[VM_READ] = PAGE_READONLY_X,
arch/parisc/kernel/ftrace.c
+1 -1
View File
@@ -87,7 +87,7 @@ int ftrace_enable_ftrace_graph_caller(void)
int ftrace_disable_ftrace_graph_caller(void)
{
static_key_enable(&ftrace_graph_enable.key);
static_key_disable(&ftrace_graph_enable.key);
return 0;
}
#endif
arch/powerpc/Kconfig
+2 -2
View File
@@ -273,8 +273,8 @@ config PPC
select HAVE_RSEQ
select HAVE_SETUP_PER_CPU_AREA if PPC64
select HAVE_SOFTIRQ_ON_OWN_STACK
select HAVE_STACKPROTECTOR if PPC32 && $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=r2)
select HAVE_STACKPROTECTOR if PPC64 && $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=r13)
select HAVE_STACKPROTECTOR if PPC32 && $(cc-option,$(m32-flag) -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 -mstack-protector-guard-offset=0)
select HAVE_STACKPROTECTOR if PPC64 && $(cc-option,$(m64-flag) -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 -mstack-protector-guard-offset=0)
select HAVE_STATIC_CALL if PPC32
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_VIRT_CPU_ACCOUNTING
arch/powerpc/Makefile
+4 -9
View File
@@ -89,13 +89,6 @@ KBUILD_AFLAGS += -m$(BITS)
KBUILD_LDFLAGS += -m elf$(BITS)$(LDEMULATION)
endif
cflags-$(CONFIG_STACKPROTECTOR) += -mstack-protector-guard=tls
ifdef CONFIG_PPC64
cflags-$(CONFIG_STACKPROTECTOR) += -mstack-protector-guard-reg=r13
else
cflags-$(CONFIG_STACKPROTECTOR) += -mstack-protector-guard-reg=r2
endif
LDFLAGS_vmlinux-y := -Bstatic
LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) := -pie
LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) += -z notext
@@ -389,9 +382,11 @@ prepare: stack_protector_prepare
PHONY += stack_protector_prepare
stack_protector_prepare: prepare0
ifdef CONFIG_PPC64
$(eval KBUILD_CFLAGS += -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' include/generated/asm-offsets.h))
$(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 \
-mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' include/generated/asm-offsets.h))
else
$(eval KBUILD_CFLAGS += -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' include/generated/asm-offsets.h))
$(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 \
-mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' include/generated/asm-offsets.h))
endif
endif
arch/powerpc/include/asm/dtl.h
+2 -2
View File
@@ -1,8 +1,8 @@
#ifndef _ASM_POWERPC_DTL_H
#define _ASM_POWERPC_DTL_H
#include <linux/rwsem.h>
#include <asm/lppaca.h>
#include <linux/spinlock_types.h>
/*
* Layout of entries in the hypervisor's dispatch trace log buffer.
@@ -35,7 +35,7 @@ struct dtl_entry {
#define DTL_LOG_ALL (DTL_LOG_CEDE | DTL_LOG_PREEMPT | DTL_LOG_FAULT)
extern struct kmem_cache *dtl_cache;
extern rwlock_t dtl_access_lock;
extern struct rw_semaphore dtl_access_lock;
extern void register_dtl_buffer(int cpu);
extern void alloc_dtl_buffers(unsigned long *time_limit);
arch/powerpc/include/asm/fadump.h
+7
View File
@@ -32,4 +32,11 @@ extern int early_init_dt_scan_fw_dump(unsigned long node, const char *uname,
int depth, void *data);
extern int fadump_reserve_mem(void);
#endif
#if defined(CONFIG_FA_DUMP) && defined(CONFIG_CMA)
void fadump_cma_init(void);
#else
static inline void fadump_cma_init(void) { }
#endif
#endif /* _ASM_POWERPC_FADUMP_H */
arch/powerpc/include/asm/sstep.h
-5
View File
@@ -173,9 +173,4 @@ int emulate_step(struct pt_regs *regs, ppc_inst_t instr);
*/
extern int emulate_loadstore(struct pt_regs *regs, struct instruction_op *op);
extern void emulate_vsx_load(struct instruction_op *op, union vsx_reg *reg,
const void *mem, bool cross_endian);
extern void emulate_vsx_store(struct instruction_op *op,
const union vsx_reg *reg, void *mem,
bool cross_endian);
extern int emulate_dcbz(unsigned long ea, struct pt_regs *regs);
arch/powerpc/include/asm/vdso.h
+1
View File
@@ -25,6 +25,7 @@ int vdso_getcpu_init(void);
#ifdef __VDSO64__
#define V_FUNCTION_BEGIN(name) \
.globl name; \
.type name,@function; \
name: \
#define V_FUNCTION_END(name) \
arch/powerpc/kernel/dt_cpu_ftrs.c
+1 -1
View File
@@ -857,7 +857,7 @@ bool __init dt_cpu_ftrs_init(void *fdt)
using_dt_cpu_ftrs = false;
/* Setup and verify the FDT, if it fails we just bail */
if (!early_init_dt_verify(fdt))
if (!early_init_dt_verify(fdt, __pa(fdt)))
return false;
if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))
arch/powerpc/kernel/fadump.c
+7 -16
View File
@@ -80,27 +80,23 @@ static struct cma *fadump_cma;
* But for some reason even if it fails we still have the memory reservation
* with us and we can still continue doing fadump.
*/
static int __init fadump_cma_init(void)
void __init fadump_cma_init(void)
{
unsigned long long base, size;
int rc;
if (!fw_dump.fadump_enabled)
return 0;
if (!fw_dump.fadump_supported || !fw_dump.fadump_enabled ||
fw_dump.dump_active)
return;
/*
* Do not use CMA if user has provided fadump=nocma kernel parameter.
* Return 1 to continue with fadump old behaviour.
*/
if (fw_dump.nocma)
return 1;
if (fw_dump.nocma || !fw_dump.boot_memory_size)
return;
base = fw_dump.reserve_dump_area_start;
size = fw_dump.boot_memory_size;
if (!size)
return 0;
rc = cma_init_reserved_mem(base, size, 0, "fadump_cma", &fadump_cma);
if (rc) {
pr_err("Failed to init cma area for firmware-assisted dump,%d\n", rc);
@@ -110,7 +106,7 @@ static int __init fadump_cma_init(void)
* blocked from production system usage. Hence return 1,
* so that we can continue with fadump.
*/
return 1;
return;
}
/*
@@ -127,10 +123,7 @@ static int __init fadump_cma_init(void)
cma_get_size(fadump_cma),
(unsigned long)cma_get_base(fadump_cma) >> 20,
fw_dump.reserve_dump_area_size);
return 1;
}
#else
static int __init fadump_cma_init(void) { return 1; }
#endif /* CONFIG_CMA */
/* Scan the Firmware Assisted dump configuration details. */
@@ -647,8 +640,6 @@ int __init fadump_reserve_mem(void)
pr_info("Reserved %lldMB of memory at %#016llx (System RAM: %lldMB)\n",
(size >> 20), base, (memblock_phys_mem_size() >> 20));
ret = fadump_cma_init();
}
return ret;
arch/powerpc/kernel/prom.c
+1 -1
View File
@@ -781,7 +781,7 @@ void __init early_init_devtree(void *params)
DBG(" -> early_init_devtree(%px)\n", params);
/* Too early to BUG_ON(), do it by hand */
if (!early_init_dt_verify(params))
if (!early_init_dt_verify(params, __pa(params)))
panic("BUG: Failed verifying flat device tree, bad version?");
of_scan_flat_dt(early_init_dt_scan_model, NULL);
arch/powerpc/kernel/setup-common.c
+4 -2
View File
@@ -988,9 +988,11 @@ void __init setup_arch(char **cmdline_p)
initmem_init();
/*
* Reserve large chunks of memory for use by CMA for KVM and hugetlb. These must
* be called after initmem_init(), so that pageblock_order is initialised.
* Reserve large chunks of memory for use by CMA for fadump, KVM and
* hugetlb. These must be called after initmem_init(), so that
* pageblock_order is initialised.
*/
fadump_cma_init();
kvm_cma_reserve();
gigantic_hugetlb_cma_reserve();
arch/powerpc/kernel/setup_64.c
+1
View File
@@ -924,6 +924,7 @@ static int __init disable_hardlockup_detector(void)
hardlockup_detector_disable();
#else
if (firmware_has_feature(FW_FEATURE_LPAR)) {
check_kvm_guest();
if (is_kvm_guest())
hardlockup_detector_disable();
}
arch/powerpc/kernel/vmlinux.lds.S
-2
View File
@@ -123,8 +123,6 @@ SECTIONS
*/
*(.sfpr);
*(.text.asan.* .text.tsan.*)
MEM_KEEP(init.text)
MEM_KEEP(exit.text)
} :text
. = ALIGN(PAGE_SIZE);
arch/powerpc/kexec/file_load_64.c
+7 -2
View File
@@ -916,13 +916,18 @@ int setup_purgatory_ppc64(struct kimage *image, const void *slave_code,
if (dn) {
u64 val;
of_property_read_u64(dn, "opal-base-address", &val);
ret = of_property_read_u64(dn, "opal-base-address", &val);
if (ret)
goto out;
ret = kexec_purgatory_get_set_symbol(image, "opal_base", &val,
sizeof(val), false);
if (ret)
goto out;
of_property_read_u64(dn, "opal-entry-address", &val);
ret = of_property_read_u64(dn, "opal-entry-address", &val);
if (ret)
goto out;
ret = kexec_purgatory_get_set_symbol(image, "opal_entry", &val,
sizeof(val), false);
}

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