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drm/amdgpu/pm: Fix code alignment issue

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Fix code alignment issue

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reported-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ma Jun
2024-05-09 10:38:41 +08:00
committed by Alex Deucher
parent 7fc7db824c
commit 948e209475
2 changed files with 4 additions and 4 deletions
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drivers/gpu/drm/amd/pm/amdgpu_pm.c
+2 -2
View File
@@ -4381,8 +4381,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
/* under multi-vf mode, the hwmon attributes are all not supported */
if (mode != SRIOV_VF_MODE_MULTI_VF) {
adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev,
DRIVER_NAME, adev,
hwmon_groups);
DRIVER_NAME, adev,
hwmon_groups);
if (IS_ERR(adev->pm.int_hwmon_dev)) {
ret = PTR_ERR(adev->pm.int_hwmon_dev);
dev_err(adev->dev, "Unable to register hwmon device: %d\n", ret);
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+2 -2
View File
@@ -2562,8 +2562,8 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu,
(amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10) &&
smu->adev->pm.fw_version >= 0x00504500)) {
workload_type = smu_cmn_to_asic_specific_index(smu,
CMN2ASIC_MAPPING_WORKLOAD,
PP_SMC_POWER_PROFILE_POWERSAVING);
CMN2ASIC_MAPPING_WORKLOAD,
PP_SMC_POWER_PROFILE_POWERSAVING);
if (workload_type >= 0)
workload_mask |= 1 << workload_type;
}