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spi: cadence-quadspi: fix incorrect supports_op() return value

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[ Upstream commit f1d388f216 ]

Since the conversion to spi-mem, the driver advertised support for
various operations that cqspi_set_protocol() was never expected to handle
correctly - in particuar all non-DTR operations with command or address
buswidth > 1. For DTR, all operations except for 8-8-8 would fail, as
cqspi_set_protocol() returns -EINVAL.

In non-DTR mode, this resulted in data corruption for SPI-NOR flashes that
support such operations. As a minimal fix that can be backported to stable
kernels, simply disallow the unsupported operations again to avoid this
issue.

Fixes: a314f63677 ("mtd: spi-nor: Convert cadence-quadspi to use spi-mem framework")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220406132832.199777-1-matthias.schiffer@ew.tq-group.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Matthias Schiffer
2022-04-06 15:28:32 +02:00
committed by Greg Kroah-Hartman
parent a583f2f3c8
commit 8920a03a3a
1 changed files with 17 additions and 2 deletions
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drivers/spi/spi-cadence-quadspi.c
+17 -2
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@@ -1226,9 +1226,24 @@ static bool cqspi_supports_mem_op(struct spi_mem *mem,
all_false = !op->cmd.dtr && !op->addr.dtr && !op->dummy.dtr &&
!op->data.dtr;
/* Mixed DTR modes not supported. */
if (!(all_true || all_false))
if (all_true) {
/* Right now we only support 8-8-8 DTR mode. */
if (op->cmd.nbytes && op->cmd.buswidth != 8)
return false;
if (op->addr.nbytes && op->addr.buswidth != 8)
return false;
if (op->data.nbytes && op->data.buswidth != 8)
return false;
} else if (all_false) {
/* Only 1-1-X ops are supported without DTR */
if (op->cmd.nbytes && op->cmd.buswidth > 1)
return false;
if (op->addr.nbytes && op->addr.buswidth > 1)
return false;
} else {
/* Mixed DTR modes are not supported. */
return false;
}
if (all_true)
return spi_mem_dtr_supports_op(mem, op);