ASoC: rt721-sdca: Add RT721 SDCA driver
This is the initial codec driver for rt721-sdca. It's a three functions (jack,mic,amp) soundwire driver. Signed-off-by: Jack Yu <jack.yu@realtek.com> v2: Fix typo in mbq default registers. v3: Include soundwire common functions for Realtek. Link: https://patch.msgid.link/d18b35f8b6934fc6a2be6c4458a63fe5@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jack Yu
@@ -222,6 +222,7 @@ config SND_SOC_ALL_CODECS
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imply SND_SOC_RT712_SDCA_DMIC_SDW
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imply SND_SOC_RT715_SDW
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imply SND_SOC_RT715_SDCA_SDW
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imply SND_SOC_RT721_SDCA_SDW
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imply SND_SOC_RT722_SDCA_SDW
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imply SND_SOC_RT1308_SDW
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imply SND_SOC_RT1316_SDW
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@@ -1748,6 +1749,12 @@ config SND_SOC_RT712_SDCA_DMIC_SDW
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select REGMAP_SOUNDWIRE
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select REGMAP_SOUNDWIRE_MBQ
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config SND_SOC_RT721_SDCA_SDW
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tristate "Realtek RT721 SDCA Codec - SDW"
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depends on SOUNDWIRE
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select REGMAP_SOUNDWIRE
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select REGMAP_SOUNDWIRE_MBQ
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config SND_SOC_RT722_SDCA_SDW
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tristate "Realtek RT722 SDCA Codec - SDW"
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depends on SOUNDWIRE
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@@ -263,6 +263,7 @@ snd-soc-rt712-sdca-y := rt712-sdca.o rt712-sdca-sdw.o
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snd-soc-rt712-sdca-dmic-y := rt712-sdca-dmic.o
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snd-soc-rt715-y := rt715.o rt715-sdw.o
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snd-soc-rt715-sdca-y := rt715-sdca.o rt715-sdca-sdw.o
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snd-soc-rt721-sdca-y := rt721-sdca.o rt721-sdca-sdw.o
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snd-soc-rt722-sdca-y := rt722-sdca.o rt722-sdca-sdw.o
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snd-soc-rt9120-y := rt9120.o
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snd-soc-rtq9128-y := rtq9128.o
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@@ -670,6 +671,7 @@ obj-$(CONFIG_SND_SOC_RT712_SDCA_SDW) += snd-soc-rt712-sdca.o
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obj-$(CONFIG_SND_SOC_RT712_SDCA_DMIC_SDW) += snd-soc-rt712-sdca-dmic.o
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obj-$(CONFIG_SND_SOC_RT715) += snd-soc-rt715.o
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obj-$(CONFIG_SND_SOC_RT715_SDCA_SDW) += snd-soc-rt715-sdca.o
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obj-$(CONFIG_SND_SOC_RT721_SDCA_SDW) += snd-soc-rt721-sdca.o
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obj-$(CONFIG_SND_SOC_RT722_SDCA_SDW) += snd-soc-rt722-sdca.o
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obj-$(CONFIG_SND_SOC_RT9120) += snd-soc-rt9120.o
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obj-$(CONFIG_SND_SOC_RTQ9128) += snd-soc-rtq9128.o
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@@ -0,0 +1,551 @@
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// SPDX-License-Identifier: GPL-2.0-only
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//
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// rt721-sdca-sdw.c -- rt721 SDCA ALSA SoC audio driver
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//
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// Copyright(c) 2024 Realtek Semiconductor Corp.
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//
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//
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/pm_runtime.h>
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#include <linux/soundwire/sdw_registers.h>
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#include "rt721-sdca.h"
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#include "rt721-sdca-sdw.h"
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#include "rt-sdw-common.h"
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static bool rt721_sdca_readable_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case 0x2f01 ... 0x2f0a:
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case 0x2f35:
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case 0x2f50:
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case 0x2f51:
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case 0x2f58 ... 0x2f5d:
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XUV,
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RT721_SDCA_CTL_XUV, 0):
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49,
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RT721_SDCA_CTL_SELECTED_MODE, 0):
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49,
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RT721_SDCA_CTL_DETECTED_MODE, 0):
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case SDW_SDCA_CTL(FUNC_NUM_HID, RT721_SDCA_ENT_HID01,
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RT721_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ... SDW_SDCA_CTL(FUNC_NUM_HID,
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RT721_SDCA_ENT_HID01, RT721_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
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case RT721_BUF_ADDR_HID1 ... RT721_BUF_ADDR_HID2:
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return true;
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default:
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return false;
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}
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}
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static bool rt721_sdca_volatile_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case 0x2f01:
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case 0x2f51:
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_GE49,
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RT721_SDCA_CTL_DETECTED_MODE, 0):
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_XUV,
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RT721_SDCA_CTL_XUV, 0):
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case SDW_SDCA_CTL(FUNC_NUM_HID, RT721_SDCA_ENT_HID01,
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RT721_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ... SDW_SDCA_CTL(FUNC_NUM_HID,
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RT721_SDCA_ENT_HID01, RT721_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
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case RT721_BUF_ADDR_HID1 ... RT721_BUF_ADDR_HID2:
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return true;
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default:
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return false;
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}
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}
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static bool rt721_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case 0x0900007:
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case 0x0a00005:
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case 0x0c00005:
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case 0x0d00014:
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case 0x0310100:
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case 0x2000001:
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case 0x2000002:
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case 0x2000003:
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case 0x2000013:
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case 0x200003c:
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case 0x2000046:
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case 0x5810000:
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case 0x5810036:
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case 0x5810037:
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case 0x5810038:
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case 0x5810039:
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case 0x5b10018:
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case 0x5b10019:
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case 0x5f00045:
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case 0x5f00048:
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case 0x6100000:
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case 0x6100005:
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case 0x6100006:
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case 0x610000d:
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case 0x6100010:
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case 0x6100011:
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case 0x6100013:
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case 0x6100015:
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case 0x6100017:
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case 0x6100025:
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case 0x6100029:
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case 0x610002c ... 0x610002f:
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case 0x6100053 ... 0x6100055:
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case 0x6100057:
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case 0x610005a:
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case 0x610005b:
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case 0x610006a:
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case 0x610006d:
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case 0x6100092:
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, RT721_SDCA_CTL_FU_VOLUME,
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CH_L):
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, RT721_SDCA_CTL_FU_VOLUME,
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CH_R):
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, RT721_SDCA_CTL_FU_VOLUME,
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CH_L):
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, RT721_SDCA_CTL_FU_VOLUME,
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CH_R):
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44,
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RT721_SDCA_CTL_FU_CH_GAIN, CH_L):
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case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44,
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RT721_SDCA_CTL_FU_CH_GAIN, CH_R):
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case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME,
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CH_01):
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case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME,
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CH_02):
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case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME,
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CH_03):
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case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME,
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CH_04):
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case SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, RT721_SDCA_CTL_FU_VOLUME, CH_L):
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case SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, RT721_SDCA_CTL_FU_VOLUME, CH_R):
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return true;
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default:
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return false;
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}
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}
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static bool rt721_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case 0x0310100:
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case 0x0a00005:
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case 0x0c00005:
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case 0x0d00014:
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case 0x2000000:
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case 0x200000d:
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case 0x2000019:
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case 0x2000020:
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case 0x2000030:
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case 0x2000046:
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case 0x2000067:
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case 0x2000084:
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case 0x2000086:
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case 0x5810000:
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case 0x5810036:
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case 0x5810037:
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case 0x5810038:
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case 0x5810039:
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case 0x5b10018:
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case 0x5b10019:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config rt721_sdca_regmap = {
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.reg_bits = 32,
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.val_bits = 8,
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.readable_reg = rt721_sdca_readable_register,
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.volatile_reg = rt721_sdca_volatile_register,
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.max_register = 0x44ffffff,
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.reg_defaults = rt721_sdca_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(rt721_sdca_reg_defaults),
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.cache_type = REGCACHE_MAPLE,
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.use_single_read = true,
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.use_single_write = true,
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};
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static const struct regmap_config rt721_sdca_mbq_regmap = {
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.name = "sdw-mbq",
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.reg_bits = 32,
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.val_bits = 16,
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.readable_reg = rt721_sdca_mbq_readable_register,
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.volatile_reg = rt721_sdca_mbq_volatile_register,
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.max_register = 0x41000312,
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.reg_defaults = rt721_sdca_mbq_defaults,
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.num_reg_defaults = ARRAY_SIZE(rt721_sdca_mbq_defaults),
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.cache_type = REGCACHE_MAPLE,
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.use_single_read = true,
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.use_single_write = true,
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};
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static int rt721_sdca_update_status(struct sdw_slave *slave,
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enum sdw_slave_status status)
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{
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struct rt721_sdca_priv *rt721 = dev_get_drvdata(&slave->dev);
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if (status == SDW_SLAVE_UNATTACHED)
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rt721->hw_init = false;
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if (status == SDW_SLAVE_ATTACHED) {
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if (rt721->hs_jack) {
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/*
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* Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then
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* if the device attached again, we will need to set the setting back.
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* It could avoid losing the jack detection interrupt.
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* This also could sync with the cache value as the rt721_sdca_jack_init set.
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*/
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sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK1,
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SDW_SCP_SDCA_INTMASK_SDCA_6);
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sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INTMASK2,
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SDW_SCP_SDCA_INTMASK_SDCA_8);
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}
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}
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/*
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* Perform initialization only if slave status is present and
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* hw_init flag is false
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*/
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if (rt721->hw_init || status != SDW_SLAVE_ATTACHED)
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return 0;
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/* perform I/O transfers required for Slave initialization */
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return rt721_sdca_io_init(&slave->dev, slave);
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}
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static int rt721_sdca_read_prop(struct sdw_slave *slave)
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{
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struct sdw_slave_prop *prop = &slave->prop;
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int nval;
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int i, j;
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u32 bit;
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unsigned long addr;
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struct sdw_dpn_prop *dpn;
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sdw_slave_read_prop(slave);
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prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
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prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
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prop->paging_support = true;
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/*
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* port = 1 for headphone playback
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* port = 2 for headset-mic capture
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* port = 3 for speaker playback
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* port = 6 for digital-mic capture
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*/
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prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */
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prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */
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nval = hweight32(prop->source_ports);
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prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
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sizeof(*prop->src_dpn_prop), GFP_KERNEL);
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if (!prop->src_dpn_prop)
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return -ENOMEM;
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i = 0;
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dpn = prop->src_dpn_prop;
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addr = prop->source_ports;
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for_each_set_bit(bit, &addr, 32) {
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dpn[i].num = bit;
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dpn[i].type = SDW_DPN_FULL;
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dpn[i].simple_ch_prep_sm = true;
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dpn[i].ch_prep_timeout = 10;
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i++;
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}
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/* do this again for sink now */
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nval = hweight32(prop->sink_ports);
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prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
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sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
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if (!prop->sink_dpn_prop)
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return -ENOMEM;
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j = 0;
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dpn = prop->sink_dpn_prop;
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addr = prop->sink_ports;
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for_each_set_bit(bit, &addr, 32) {
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dpn[j].num = bit;
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dpn[j].type = SDW_DPN_FULL;
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dpn[j].simple_ch_prep_sm = true;
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dpn[j].ch_prep_timeout = 10;
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j++;
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}
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/* set the timeout values */
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prop->clk_stop_timeout = 900;
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/* wake-up event */
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prop->wake_capable = 1;
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/* Three data lanes are supported by rt721-sdca codec */
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prop->lane_control_support = true;
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return 0;
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}
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static int rt721_sdca_interrupt_callback(struct sdw_slave *slave,
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struct sdw_slave_intr_status *status)
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{
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struct rt721_sdca_priv *rt721 = dev_get_drvdata(&slave->dev);
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int ret, stat;
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int count = 0, retry = 3;
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unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0;
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if (cancel_delayed_work_sync(&rt721->jack_detect_work)) {
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dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__);
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/* avoid the HID owner doesn't change to device */
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if (rt721->scp_sdca_stat2)
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scp_sdca_stat2 = rt721->scp_sdca_stat2;
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}
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/*
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* The critical section below intentionally protects a rather large piece of code.
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* We don't want to allow the system suspend to disable an interrupt while we are
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* processing it, which could be problematic given the quirky SoundWire interrupt
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* scheme. We do want however to prevent new workqueues from being scheduled if
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* the disable_irq flag was set during system suspend.
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*/
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mutex_lock(&rt721->disable_irq_lock);
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ret = sdw_read_no_pm(rt721->slave, SDW_SCP_SDCA_INT1);
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if (ret < 0)
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goto io_error;
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rt721->scp_sdca_stat1 = ret;
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ret = sdw_read_no_pm(rt721->slave, SDW_SCP_SDCA_INT2);
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if (ret < 0)
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goto io_error;
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rt721->scp_sdca_stat2 = ret;
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if (scp_sdca_stat2)
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rt721->scp_sdca_stat2 |= scp_sdca_stat2;
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do {
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/* clear flag */
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ret = sdw_read_no_pm(rt721->slave, SDW_SCP_SDCA_INT1);
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if (ret < 0)
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goto io_error;
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if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) {
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ret = sdw_update_no_pm(rt721->slave, SDW_SCP_SDCA_INT1,
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SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0);
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if (ret < 0)
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goto io_error;
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} else if (ret & SDW_SCP_SDCA_INTMASK_SDCA_6) {
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ret = sdw_update_no_pm(rt721->slave, SDW_SCP_SDCA_INT1,
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SDW_SCP_SDCA_INT_SDCA_6, SDW_SCP_SDCA_INT_SDCA_6);
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if (ret < 0)
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goto io_error;
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}
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ret = sdw_read_no_pm(rt721->slave, SDW_SCP_SDCA_INT2);
|
||||
if (ret < 0)
|
||||
goto io_error;
|
||||
if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) {
|
||||
ret = sdw_write_no_pm(rt721->slave, SDW_SCP_SDCA_INT2,
|
||||
SDW_SCP_SDCA_INTMASK_SDCA_8);
|
||||
if (ret < 0)
|
||||
goto io_error;
|
||||
}
|
||||
|
||||
/* check if flag clear or not */
|
||||
ret = sdw_read_no_pm(rt721->slave, SDW_DP0_INT);
|
||||
if (ret < 0)
|
||||
goto io_error;
|
||||
sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
|
||||
|
||||
ret = sdw_read_no_pm(rt721->slave, SDW_SCP_SDCA_INT1);
|
||||
if (ret < 0)
|
||||
goto io_error;
|
||||
scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0;
|
||||
|
||||
ret = sdw_read_no_pm(rt721->slave, SDW_SCP_SDCA_INT2);
|
||||
if (ret < 0)
|
||||
goto io_error;
|
||||
scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8;
|
||||
|
||||
stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade;
|
||||
|
||||
count++;
|
||||
} while (stat != 0 && count < retry);
|
||||
|
||||
if (stat)
|
||||
dev_warn(&slave->dev,
|
||||
"%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
|
||||
rt721->scp_sdca_stat1, rt721->scp_sdca_stat2);
|
||||
ret = sdw_read_no_pm(rt721->slave, SDW_SCP_SDCA_INT1);
|
||||
ret = sdw_read_no_pm(rt721->slave, SDW_SCP_SDCA_INT2);
|
||||
|
||||
if (status->sdca_cascade && !rt721->disable_irq)
|
||||
mod_delayed_work(system_power_efficient_wq,
|
||||
&rt721->jack_detect_work, msecs_to_jiffies(280));
|
||||
|
||||
mutex_unlock(&rt721->disable_irq_lock);
|
||||
|
||||
return 0;
|
||||
|
||||
io_error:
|
||||
mutex_unlock(&rt721->disable_irq_lock);
|
||||
pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct sdw_slave_ops rt721_sdca_slave_ops = {
|
||||
.read_prop = rt721_sdca_read_prop,
|
||||
.interrupt_callback = rt721_sdca_interrupt_callback,
|
||||
.update_status = rt721_sdca_update_status,
|
||||
};
|
||||
|
||||
static int rt721_sdca_sdw_probe(struct sdw_slave *slave,
|
||||
const struct sdw_device_id *id)
|
||||
{
|
||||
struct regmap *regmap, *mbq_regmap;
|
||||
|
||||
/* Regmap Initialization */
|
||||
mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt721_sdca_mbq_regmap);
|
||||
if (IS_ERR(mbq_regmap))
|
||||
return PTR_ERR(mbq_regmap);
|
||||
|
||||
regmap = devm_regmap_init_sdw(slave, &rt721_sdca_regmap);
|
||||
if (IS_ERR(regmap))
|
||||
return PTR_ERR(regmap);
|
||||
|
||||
return rt721_sdca_init(&slave->dev, regmap, mbq_regmap, slave);
|
||||
}
|
||||
|
||||
static int rt721_sdca_sdw_remove(struct sdw_slave *slave)
|
||||
{
|
||||
struct rt721_sdca_priv *rt721 = dev_get_drvdata(&slave->dev);
|
||||
|
||||
if (rt721->hw_init) {
|
||||
cancel_delayed_work_sync(&rt721->jack_detect_work);
|
||||
cancel_delayed_work_sync(&rt721->jack_btn_check_work);
|
||||
}
|
||||
|
||||
if (rt721->first_hw_init)
|
||||
pm_runtime_disable(&slave->dev);
|
||||
|
||||
mutex_destroy(&rt721->calibrate_mutex);
|
||||
mutex_destroy(&rt721->disable_irq_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct sdw_device_id rt721_sdca_id[] = {
|
||||
SDW_SLAVE_ENTRY_EXT(0x025d, 0x721, 0x3, 0x1, 0),
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(sdw, rt721_sdca_id);
|
||||
|
||||
static int __maybe_unused rt721_sdca_dev_suspend(struct device *dev)
|
||||
{
|
||||
struct rt721_sdca_priv *rt721 = dev_get_drvdata(dev);
|
||||
|
||||
if (!rt721->hw_init)
|
||||
return 0;
|
||||
|
||||
cancel_delayed_work_sync(&rt721->jack_detect_work);
|
||||
cancel_delayed_work_sync(&rt721->jack_btn_check_work);
|
||||
|
||||
regcache_cache_only(rt721->regmap, true);
|
||||
regcache_cache_only(rt721->mbq_regmap, true);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __maybe_unused rt721_sdca_dev_system_suspend(struct device *dev)
|
||||
{
|
||||
struct rt721_sdca_priv *rt721_sdca = dev_get_drvdata(dev);
|
||||
struct sdw_slave *slave = dev_to_sdw_dev(dev);
|
||||
int ret1, ret2;
|
||||
|
||||
if (!rt721_sdca->hw_init)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* prevent new interrupts from being handled after the
|
||||
* deferred work completes and before the parent disables
|
||||
* interrupts on the link
|
||||
*/
|
||||
mutex_lock(&rt721_sdca->disable_irq_lock);
|
||||
rt721_sdca->disable_irq = true;
|
||||
ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1,
|
||||
SDW_SCP_SDCA_INTMASK_SDCA_0 | SDW_SCP_SDCA_INTMASK_SDCA_6, 0);
|
||||
ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2,
|
||||
SDW_SCP_SDCA_INTMASK_SDCA_8, 0);
|
||||
mutex_unlock(&rt721_sdca->disable_irq_lock);
|
||||
|
||||
if (ret1 < 0 || ret2 < 0) {
|
||||
/* log but don't prevent suspend from happening */
|
||||
dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__);
|
||||
}
|
||||
|
||||
return rt721_sdca_dev_suspend(dev);
|
||||
}
|
||||
|
||||
#define RT721_PROBE_TIMEOUT 5000
|
||||
|
||||
static int __maybe_unused rt721_sdca_dev_resume(struct device *dev)
|
||||
{
|
||||
struct sdw_slave *slave = dev_to_sdw_dev(dev);
|
||||
struct rt721_sdca_priv *rt721 = dev_get_drvdata(dev);
|
||||
unsigned long time;
|
||||
|
||||
if (!rt721->first_hw_init)
|
||||
return 0;
|
||||
|
||||
if (!slave->unattach_request) {
|
||||
mutex_lock(&rt721->disable_irq_lock);
|
||||
if (rt721->disable_irq == true) {
|
||||
sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_6);
|
||||
sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8);
|
||||
rt721->disable_irq = false;
|
||||
}
|
||||
mutex_unlock(&rt721->disable_irq_lock);
|
||||
goto regmap_sync;
|
||||
}
|
||||
|
||||
time = wait_for_completion_timeout(&slave->initialization_complete,
|
||||
msecs_to_jiffies(RT721_PROBE_TIMEOUT));
|
||||
if (!time) {
|
||||
dev_err(&slave->dev, "Initialization not complete, timed out\n");
|
||||
sdw_show_ping_status(slave->bus, true);
|
||||
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
regmap_sync:
|
||||
slave->unattach_request = 0;
|
||||
regcache_cache_only(rt721->regmap, false);
|
||||
regcache_sync(rt721->regmap);
|
||||
regcache_cache_only(rt721->mbq_regmap, false);
|
||||
regcache_sync(rt721->mbq_regmap);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops rt721_sdca_pm = {
|
||||
SET_SYSTEM_SLEEP_PM_OPS(rt721_sdca_dev_system_suspend, rt721_sdca_dev_resume)
|
||||
SET_RUNTIME_PM_OPS(rt721_sdca_dev_suspend, rt721_sdca_dev_resume, NULL)
|
||||
};
|
||||
|
||||
static struct sdw_driver rt721_sdca_sdw_driver = {
|
||||
.driver = {
|
||||
.name = "rt721-sdca",
|
||||
.owner = THIS_MODULE,
|
||||
.pm = &rt721_sdca_pm,
|
||||
},
|
||||
.probe = rt721_sdca_sdw_probe,
|
||||
.remove = rt721_sdca_sdw_remove,
|
||||
.ops = &rt721_sdca_slave_ops,
|
||||
.id_table = rt721_sdca_id,
|
||||
};
|
||||
module_sdw_driver(rt721_sdca_sdw_driver);
|
||||
|
||||
MODULE_DESCRIPTION("ASoC RT721 SDCA SDW driver");
|
||||
MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -0,0 +1,150 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* rt721-sdca-sdw.h -- RT721 SDCA ALSA SoC audio driver header
|
||||
*
|
||||
* Copyright(c) 2024 Realtek Semiconductor Corp.
|
||||
*/
|
||||
|
||||
#ifndef __RT721_SDW_H__
|
||||
#define __RT721_SDW_H__
|
||||
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/soundwire/sdw_registers.h>
|
||||
|
||||
static const struct reg_default rt721_sdca_reg_defaults[] = {
|
||||
{ 0x202d, 0x00 },
|
||||
{ 0x2f01, 0x00 },
|
||||
{ 0x2f02, 0x09 },
|
||||
{ 0x2f03, 0x08 },
|
||||
{ 0x2f04, 0x00 },
|
||||
{ 0x2f05, 0x0e },
|
||||
{ 0x2f06, 0x01 },
|
||||
{ 0x2f09, 0x00 },
|
||||
{ 0x2f0a, 0x00 },
|
||||
{ 0x2f35, 0x00 },
|
||||
{ 0x2f50, 0xf0 },
|
||||
{ 0x2f58, 0x07 },
|
||||
{ 0x2f59, 0x07 },
|
||||
{ 0x2f5a, 0x00 },
|
||||
{ 0x2f5b, 0x07 },
|
||||
{ 0x2f5c, 0x27 },
|
||||
{ 0x2f5d, 0x07 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS01,
|
||||
RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_CS11,
|
||||
RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE12,
|
||||
RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PDE40,
|
||||
RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_03), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_04), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_CS1F,
|
||||
RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_IT26,
|
||||
RT721_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_PDE2A,
|
||||
RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_CS31,
|
||||
RT721_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_L), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_R), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
|
||||
RT721_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_OT23,
|
||||
RT721_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_PDE23,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_FU55,
|
||||
RT721_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
|
||||
};
|
||||
|
||||
static const struct reg_default rt721_sdca_mbq_defaults[] = {
|
||||
{ 0x0900007, 0xc004 },
|
||||
{ 0x2000001, 0x0000 },
|
||||
{ 0x2000002, 0x0000 },
|
||||
{ 0x2000003, 0x0000 },
|
||||
{ 0x2000013, 0x8001 },
|
||||
{ 0x200003c, 0x0000 },
|
||||
{ 0x2000046, 0x3400 },
|
||||
{ 0x5f00044, 0x6040 },
|
||||
{ 0x5f00045, 0x3333 },
|
||||
{ 0x5f00048, 0x0000 },
|
||||
{ 0x6100005, 0x0005 },
|
||||
{ 0x6100006, 0x0000 },
|
||||
{ 0x610000d, 0x0051 },
|
||||
{ 0x6100010, 0x0180 },
|
||||
{ 0x6100011, 0x0000 },
|
||||
{ 0x6100013, 0x0000 },
|
||||
{ 0x6100015, 0x0000 },
|
||||
{ 0x6100017, 0x8049 },
|
||||
{ 0x6100025, 0x1000 },
|
||||
{ 0x6100029, 0x0809 },
|
||||
{ 0x610002c, 0x2828 },
|
||||
{ 0x610002d, 0x2929 },
|
||||
{ 0x610002e, 0x3529 },
|
||||
{ 0x610002f, 0x2901 },
|
||||
{ 0x6100053, 0x2630 },
|
||||
{ 0x6100054, 0x2a2a },
|
||||
{ 0x6100055, 0x152f },
|
||||
{ 0x6100057, 0x2200 },
|
||||
{ 0x610005a, 0x2a4b },
|
||||
{ 0x610005b, 0x2a00 },
|
||||
{ 0x610006a, 0x0102 },
|
||||
{ 0x610006d, 0x0102 },
|
||||
{ 0x6100092, 0x4f61 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, RT721_SDCA_CTL_FU_VOLUME,
|
||||
CH_L), 0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU05, RT721_SDCA_CTL_FU_VOLUME,
|
||||
CH_R), 0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, RT721_SDCA_CTL_FU_VOLUME,
|
||||
CH_L), 0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_USER_FU0F, RT721_SDCA_CTL_FU_VOLUME,
|
||||
CH_R), 0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, RT721_SDCA_CTL_FU_CH_GAIN,
|
||||
CH_L), 0xfe00 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT721_SDCA_ENT_PLATFORM_FU44, RT721_SDCA_CTL_FU_CH_GAIN,
|
||||
CH_R), 0xfe00 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, RT721_SDCA_CTL_FU_CH_GAIN, CH_01),
|
||||
0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, RT721_SDCA_CTL_FU_CH_GAIN, CH_02),
|
||||
0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, RT721_SDCA_CTL_FU_CH_GAIN, CH_03),
|
||||
0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_FU15, RT721_SDCA_CTL_FU_CH_GAIN, CH_04),
|
||||
0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME,
|
||||
CH_01), 0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME,
|
||||
CH_02), 0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME,
|
||||
CH_03), 0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT721_SDCA_ENT_USER_FU1E, RT721_SDCA_CTL_FU_VOLUME,
|
||||
CH_04), 0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, RT721_SDCA_CTL_FU_VOLUME, CH_L),
|
||||
0x0000 },
|
||||
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT721_SDCA_ENT_USER_FU06, RT721_SDCA_CTL_FU_VOLUME, CH_R),
|
||||
0x0000 },
|
||||
};
|
||||
|
||||
#endif /* __RT721_SDW_H__ */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,268 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* rt721-sdca.h -- RT721 SDCA ALSA SoC audio driver header
|
||||
*
|
||||
* Copyright(c) 2024 Realtek Semiconductor Corp.
|
||||
*/
|
||||
|
||||
#ifndef __RT721_H__
|
||||
#define __RT721_H__
|
||||
|
||||
#include <linux/pm.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/soundwire/sdw.h>
|
||||
#include <linux/soundwire/sdw_type.h>
|
||||
#include <sound/soc.h>
|
||||
#include <linux/workqueue.h>
|
||||
|
||||
struct rt721_sdca_priv {
|
||||
struct regmap *regmap;
|
||||
struct regmap *mbq_regmap;
|
||||
struct snd_soc_component *component;
|
||||
struct sdw_slave *slave;
|
||||
struct sdw_bus_params params;
|
||||
bool hw_init;
|
||||
bool first_hw_init;
|
||||
struct mutex calibrate_mutex;
|
||||
struct mutex disable_irq_lock;
|
||||
bool disable_irq;
|
||||
/* For Headset jack & Headphone */
|
||||
unsigned int scp_sdca_stat1;
|
||||
unsigned int scp_sdca_stat2;
|
||||
struct snd_soc_jack *hs_jack;
|
||||
struct delayed_work jack_detect_work;
|
||||
struct delayed_work jack_btn_check_work;
|
||||
int jack_type;
|
||||
int jd_src;
|
||||
bool fu0f_dapm_mute;
|
||||
bool fu0f_mixer_l_mute;
|
||||
bool fu0f_mixer_r_mute;
|
||||
/* For DMIC */
|
||||
bool fu1e_dapm_mute;
|
||||
bool fu1e_mixer_mute[4];
|
||||
};
|
||||
|
||||
struct rt721_sdca_dmic_kctrl_priv {
|
||||
unsigned int reg_base;
|
||||
unsigned int count;
|
||||
unsigned int max;
|
||||
unsigned int invert;
|
||||
};
|
||||
|
||||
/* NID */
|
||||
#define RT721_ANA_POW_PART 0x01
|
||||
#define RT721_DAC_CTRL 0x04
|
||||
#define RT721_JD_CTRL 0x09
|
||||
#define RT721_CBJ_CTRL 0x0a
|
||||
#define RT721_CAP_PORT_CTRL 0x0c
|
||||
#define RT721_CLASD_AMP_CTRL 0x0d
|
||||
#define RT721_VENDOR_REG 0x20
|
||||
#define RT721_RC_CALIB_CTRL 0x40
|
||||
#define RT721_VENDOR_EQ_L 0x53
|
||||
#define RT721_VENDOR_EQ_R 0x54
|
||||
#define RT721_VENDOR_HP_CALI 0x56
|
||||
#define RT721_VENDOR_CHARGE_PUMP 0x57
|
||||
#define RT721_VENDOR_CLASD_CALI 0x58
|
||||
#define RT721_VENDOR_IMS_DRE 0x5b
|
||||
#define RT721_VENDOR_SPK_EFUSE 0x5c
|
||||
#define RT721_VENDOR_LEVEL_CTRL 0x5d
|
||||
#define RT721_VENDOR_ANA_CTL 0x5f
|
||||
#define RT721_HDA_SDCA_FLOAT 0x61
|
||||
|
||||
/* Index (NID:01h) */
|
||||
#define RT721_MBIAS_LV_CTRL2 0x07
|
||||
#define RT721_VREF1_HV_CTRL1 0x0a
|
||||
#define RT721_VREF2_LV_CTRL1 0x0b
|
||||
|
||||
/* Index (NID:04h) */
|
||||
#define RT721_DAC_2CH_CTRL3 0x02
|
||||
#define RT721_DAC_2CH_CTRL4 0x03
|
||||
|
||||
/* Index (NID:09h) */
|
||||
#define RT721_JD_1PIN_GAT_CTRL2 0x07
|
||||
|
||||
/* Index (NID:0ah) */
|
||||
#define RT721_CBJ_A0_GAT_CTRL1 0x04
|
||||
#define RT721_CBJ_A0_GAT_CTRL2 0x05
|
||||
|
||||
/* Index (NID:0Ch) */
|
||||
#define RT721_HP_AMP_2CH_CAL1 0x05
|
||||
#define RT721_HP_AMP_2CH_CAL4 0x08
|
||||
#define RT721_HP_AMP_2CH_CAL18 0x1b
|
||||
|
||||
/* Index (NID:0dh) */
|
||||
#define RT721_CLASD_AMP_2CH_CAL 0x14
|
||||
|
||||
/* Index (NID:20h) */
|
||||
#define RT721_JD_PRODUCT_NUM 0x00
|
||||
#define RT721_ANALOG_BIAS_CTL3 0x04
|
||||
#define RT721_JD_CTRL1 0x09
|
||||
#define RT721_LDO2_3_CTL1 0x0e
|
||||
#define RT721_GPIO_PAD_CTRL5 0x13
|
||||
#define RT721_LDO1_CTL 0x1a
|
||||
#define RT721_HP_JD_CTRL 0x24
|
||||
#define RT721_VD_HIDDEN_CTRL 0x26
|
||||
#define RT721_CLSD_CTRL6 0x3c
|
||||
#define RT721_COMBO_JACK_AUTO_CTL1 0x45
|
||||
#define RT721_COMBO_JACK_AUTO_CTL2 0x46
|
||||
#define RT721_COMBO_JACK_AUTO_CTL3 0x47
|
||||
#define RT721_DIGITAL_MISC_CTRL4 0x4a
|
||||
#define RT721_VREFO_GAT 0x63
|
||||
#define RT721_FSM_CTL 0x67
|
||||
#define RT721_SDCA_INTR_REC 0x82
|
||||
#define RT721_SW_CONFIG1 0x8a
|
||||
#define RT721_SW_CONFIG2 0x8b
|
||||
|
||||
/* Index (NID:40h) */
|
||||
#define RT721_RC_CALIB_CTRL0 0x00
|
||||
|
||||
/* Index (NID:58h) */
|
||||
#define RT721_DAC_DC_CALI_CTL1 0x01
|
||||
#define RT721_DAC_DC_CALI_CTL2 0x02
|
||||
#define RT721_DAC_DC_CALI_CTL3 0x03
|
||||
|
||||
/* Index (NID:5fh) */
|
||||
#define RT721_MISC_POWER_CTL0 0x00
|
||||
#define RT721_MISC_POWER_CTL31 0x31
|
||||
#define RT721_UAJ_TOP_TCON13 0x44
|
||||
#define RT721_UAJ_TOP_TCON14 0x45
|
||||
#define RT721_UAJ_TOP_TCON17 0x48
|
||||
|
||||
/* Index (NID:61h) */
|
||||
#define RT721_HDA_LEGACY_MUX_CTL0 0x00
|
||||
#define RT721_HDA_LEGACY_UAJ_CTL 0x02
|
||||
#define RT721_HDA_LEGACY_CTL1 0x05
|
||||
#define RT721_HDA_LEGACY_RESET_CTL 0x06
|
||||
#define RT721_GE_REL_CTRL1 0x0d
|
||||
#define RT721_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e
|
||||
#define RT721_GE_SDCA_RST_CTRL 0x10
|
||||
#define RT721_INT_RST_EN_CTRL 0x11
|
||||
#define RT721_XU_EVENT_EN 0x13
|
||||
#define RT721_INLINE_CTL2 0x17
|
||||
#define RT721_UMP_HID_CTRL1 0x18
|
||||
#define RT721_UMP_HID_CTRL2 0x19
|
||||
#define RT721_UMP_HID_CTRL3 0x1a
|
||||
#define RT721_UMP_HID_CTRL4 0x1b
|
||||
#define RT721_UMP_HID_CTRL5 0x1c
|
||||
#define RT721_FUNC_FLOAT_CTL0 0x22
|
||||
#define RT721_FUNC_FLOAT_CTL1 0x23
|
||||
#define RT721_FUNC_FLOAT_CTL2 0x24
|
||||
#define RT721_FUNC_FLOAT_CTL3 0x25
|
||||
#define RT721_ENT_FLOAT_CTL0 0x29
|
||||
#define RT721_ENT_FLOAT_CTL1 0x2c
|
||||
#define RT721_ENT_FLOAT_CTL2 0x2d
|
||||
#define RT721_ENT_FLOAT_CTL3 0x2e
|
||||
#define RT721_ENT_FLOAT_CTL4 0x2f
|
||||
#define RT721_CH_FLOAT_CTL1 0x45
|
||||
#define RT721_CH_FLOAT_CTL2 0x46
|
||||
#define RT721_ENT_FLOAT_CTL5 0x53
|
||||
#define RT721_ENT_FLOAT_CTL6 0x54
|
||||
#define RT721_ENT_FLOAT_CTL7 0x55
|
||||
#define RT721_ENT_FLOAT_CTL8 0x57
|
||||
#define RT721_ENT_FLOAT_CTL9 0x5a
|
||||
#define RT721_ENT_FLOAT_CTL10 0x5b
|
||||
#define RT721_CH_FLOAT_CTL3 0x6a
|
||||
#define RT721_CH_FLOAT_CTL4 0x6d
|
||||
#define RT721_CH_FLOAT_CTL5 0x70
|
||||
#define RT721_CH_FLOAT_CTL6 0x92
|
||||
|
||||
/* Parameter & Verb control 01 (0x26)(NID:20h) */
|
||||
#define RT721_HIDDEN_REG_SW_RESET (0x1 << 14)
|
||||
|
||||
/* Buffer address for HID */
|
||||
#define RT721_BUF_ADDR_HID1 0x44030000
|
||||
#define RT721_BUF_ADDR_HID2 0x44030020
|
||||
|
||||
/* RT721 SDCA Control - function number */
|
||||
#define FUNC_NUM_JACK_CODEC 0x01
|
||||
#define FUNC_NUM_MIC_ARRAY 0x02
|
||||
#define FUNC_NUM_HID 0x03
|
||||
#define FUNC_NUM_AMP 0x04
|
||||
|
||||
/* RT721 SDCA entity */
|
||||
#define RT721_SDCA_ENT_HID01 0x01
|
||||
#define RT721_SDCA_ENT_XUV 0x03
|
||||
#define RT721_SDCA_ENT_GE49 0x49
|
||||
#define RT721_SDCA_ENT_USER_FU05 0x05
|
||||
#define RT721_SDCA_ENT_USER_FU06 0x06
|
||||
#define RT721_SDCA_ENT_USER_FU0F 0x0f
|
||||
#define RT721_SDCA_ENT_USER_FU10 0x19
|
||||
#define RT721_SDCA_ENT_USER_FU1E 0x1e
|
||||
#define RT721_SDCA_ENT_FU15 0x15
|
||||
#define RT721_SDCA_ENT_PDE23 0x23
|
||||
#define RT721_SDCA_ENT_PDE40 0x40
|
||||
#define RT721_SDCA_ENT_PDE41 0x41
|
||||
#define RT721_SDCA_ENT_PDE11 0x11
|
||||
#define RT721_SDCA_ENT_PDE12 0x12
|
||||
#define RT721_SDCA_ENT_PDE2A 0x2a
|
||||
#define RT721_SDCA_ENT_CS01 0x01
|
||||
#define RT721_SDCA_ENT_CS11 0x11
|
||||
#define RT721_SDCA_ENT_CS1F 0x1f
|
||||
#define RT721_SDCA_ENT_CS1C 0x1c
|
||||
#define RT721_SDCA_ENT_CS31 0x31
|
||||
#define RT721_SDCA_ENT_OT23 0x42
|
||||
#define RT721_SDCA_ENT_IT26 0x26
|
||||
#define RT721_SDCA_ENT_IT09 0x09
|
||||
#define RT721_SDCA_ENT_PLATFORM_FU15 0x15
|
||||
#define RT721_SDCA_ENT_PLATFORM_FU44 0x44
|
||||
#define RT721_SDCA_ENT_XU03 0x03
|
||||
#define RT721_SDCA_ENT_XU0D 0x0d
|
||||
#define RT721_SDCA_ENT_FU55 0x55
|
||||
|
||||
/* RT721 SDCA control */
|
||||
#define RT721_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10
|
||||
#define RT721_SDCA_CTL_FU_MUTE 0x01
|
||||
#define RT721_SDCA_CTL_FU_VOLUME 0x02
|
||||
#define RT721_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10
|
||||
#define RT721_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11
|
||||
#define RT721_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12
|
||||
#define RT721_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13
|
||||
#define RT721_SDCA_CTL_SELECTED_MODE 0x01
|
||||
#define RT721_SDCA_CTL_DETECTED_MODE 0x02
|
||||
#define RT721_SDCA_CTL_REQ_POWER_STATE 0x01
|
||||
#define RT721_SDCA_CTL_VENDOR_DEF 0x30
|
||||
#define RT721_SDCA_CTL_XUV 0x34
|
||||
#define RT721_SDCA_CTL_FU_CH_GAIN 0x0b
|
||||
|
||||
/* RT721 SDCA channel */
|
||||
#define CH_L 0x01
|
||||
#define CH_R 0x02
|
||||
#define CH_01 0x01
|
||||
#define CH_02 0x02
|
||||
#define CH_03 0x03
|
||||
#define CH_04 0x04
|
||||
#define CH_08 0x08
|
||||
#define CH_09 0x09
|
||||
#define CH_0A 0x0a
|
||||
|
||||
/* sample frequency index */
|
||||
#define RT721_SDCA_RATE_8000HZ 0x01
|
||||
#define RT721_SDCA_RATE_11025HZ 0x02
|
||||
#define RT721_SDCA_RATE_12000HZ 0x03
|
||||
#define RT721_SDCA_RATE_16000HZ 0x04
|
||||
#define RT721_SDCA_RATE_22050HZ 0x05
|
||||
#define RT721_SDCA_RATE_24000HZ 0x06
|
||||
#define RT721_SDCA_RATE_32000HZ 0x07
|
||||
#define RT721_SDCA_RATE_44100HZ 0x08
|
||||
#define RT721_SDCA_RATE_48000HZ 0x09
|
||||
#define RT721_SDCA_RATE_88200HZ 0x0a
|
||||
#define RT721_SDCA_RATE_96000HZ 0x0b
|
||||
#define RT721_SDCA_RATE_176400HZ 0x0c
|
||||
#define RT721_SDCA_RATE_192000HZ 0x0d
|
||||
#define RT721_SDCA_RATE_384000HZ 0x0e
|
||||
#define RT721_SDCA_RATE_768000HZ 0x0f
|
||||
|
||||
/* RT721 HID ID */
|
||||
#define RT721_SDCA_HID_ID 0x11
|
||||
|
||||
enum {
|
||||
RT721_AIF1, /* For headset mic and headphone */
|
||||
RT721_AIF2, /* For speaker */
|
||||
RT721_AIF3, /* For dmic */
|
||||
RT721_AIFS,
|
||||
};
|
||||
|
||||
int rt721_sdca_io_init(struct device *dev, struct sdw_slave *slave);
|
||||
int rt721_sdca_init(struct device *dev, struct regmap *regmap,
|
||||
struct regmap *mbq_regmap, struct sdw_slave *slave);
|
||||
#endif /* __RT721_H__ */
|
||||
Reference in New Issue
Block a user