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drm/amdkfd: replace asic_family with asic_type

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asic_family was a duplicate of asic_type, both of type amd_asic_type.
Replace all instances of device_info->asic_family with adev->asic_type
and remove asic_family from device_info.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Graham Sider
2021-11-10 18:19:30 -05:00
committed by Alex Deucher
parent 046e674b96
commit 7eb0502ac0
10 changed files with 22 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c
+1 -1
View File
@@ -43,7 +43,7 @@ static bool cik_event_interrupt_isr(struct kfd_dev *dev,
*/
if ((ihre->source_id == CIK_INTSRC_GFX_PAGE_INV_FAULT ||
ihre->source_id == CIK_INTSRC_GFX_MEM_PROT_FAULT) &&
dev->device_info->asic_family == CHIP_HAWAII) {
dev->adev->asic_type == CHIP_HAWAII) {
struct cik_ih_ring_entry *tmp_ihre =
(struct cik_ih_ring_entry *)patched_ihre;
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+4 -4
View File
@@ -580,7 +580,7 @@ static int kfd_ioctl_dbg_register(struct file *filep,
if (!dev)
return -EINVAL;
if (dev->device_info->asic_family == CHIP_CARRIZO) {
if (dev->adev->asic_type == CHIP_CARRIZO) {
pr_debug("kfd_ioctl_dbg_register not supported on CZ\n");
return -EINVAL;
}
@@ -631,7 +631,7 @@ static int kfd_ioctl_dbg_unregister(struct file *filep,
if (!dev || !dev->dbgmgr)
return -EINVAL;
if (dev->device_info->asic_family == CHIP_CARRIZO) {
if (dev->adev->asic_type == CHIP_CARRIZO) {
pr_debug("kfd_ioctl_dbg_unregister not supported on CZ\n");
return -EINVAL;
}
@@ -676,7 +676,7 @@ static int kfd_ioctl_dbg_address_watch(struct file *filep,
if (!dev)
return -EINVAL;
if (dev->device_info->asic_family == CHIP_CARRIZO) {
if (dev->adev->asic_type == CHIP_CARRIZO) {
pr_debug("kfd_ioctl_dbg_wave_control not supported on CZ\n");
return -EINVAL;
}
@@ -784,7 +784,7 @@ static int kfd_ioctl_dbg_wave_control(struct file *filep,
if (!dev)
return -EINVAL;
if (dev->device_info->asic_family == CHIP_CARRIZO) {
if (dev->adev->asic_type == CHIP_CARRIZO) {
pr_debug("kfd_ioctl_dbg_wave_control not supported on CZ\n");
return -EINVAL;
}
drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+1 -1
View File
@@ -1340,7 +1340,7 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
int ret;
unsigned int num_cu_shared;
switch (kdev->device_info->asic_family) {
switch (kdev->adev->asic_type) {
case CHIP_KAVERI:
pcache_info = kaveri_cache_info;
num_of_cache_types = ARRAY_SIZE(kaveri_cache_info);
drivers/gpu/drm/amd/amdkfd/kfd_device.c
-29
View File
@@ -55,7 +55,6 @@ extern const struct kfd2kgd_calls gfx_v10_3_kfd2kgd;
#ifdef KFD_SUPPORT_IOMMU_V2
static const struct kfd_device_info kaveri_device_info = {
.asic_family = CHIP_KAVERI,
.asic_name = "kaveri",
.gfx_target_version = 70000,
.max_pasid_bits = 16,
@@ -75,7 +74,6 @@ static const struct kfd_device_info kaveri_device_info = {
};
static const struct kfd_device_info carrizo_device_info = {
.asic_family = CHIP_CARRIZO,
.asic_name = "carrizo",
.gfx_target_version = 80001,
.max_pasid_bits = 16,
@@ -95,7 +93,6 @@ static const struct kfd_device_info carrizo_device_info = {
};
static const struct kfd_device_info raven_device_info = {
.asic_family = CHIP_RAVEN,
.asic_name = "raven",
.gfx_target_version = 90002,
.max_pasid_bits = 16,
@@ -116,7 +113,6 @@ static const struct kfd_device_info raven_device_info = {
#ifdef CONFIG_DRM_AMDGPU_CIK
static const struct kfd_device_info hawaii_device_info = {
.asic_family = CHIP_HAWAII,
.asic_name = "hawaii",
.gfx_target_version = 70001,
.max_pasid_bits = 16,
@@ -137,7 +133,6 @@ static const struct kfd_device_info hawaii_device_info = {
#endif
static const struct kfd_device_info tonga_device_info = {
.asic_family = CHIP_TONGA,
.asic_name = "tonga",
.gfx_target_version = 80002,
.max_pasid_bits = 16,
@@ -156,7 +151,6 @@ static const struct kfd_device_info tonga_device_info = {
};
static const struct kfd_device_info fiji_device_info = {
.asic_family = CHIP_FIJI,
.asic_name = "fiji",
.gfx_target_version = 80003,
.max_pasid_bits = 16,
@@ -175,7 +169,6 @@ static const struct kfd_device_info fiji_device_info = {
};
static const struct kfd_device_info fiji_vf_device_info = {
.asic_family = CHIP_FIJI,
.asic_name = "fiji",
.gfx_target_version = 80003,
.max_pasid_bits = 16,
@@ -195,7 +188,6 @@ static const struct kfd_device_info fiji_vf_device_info = {
static const struct kfd_device_info polaris10_device_info = {
.asic_family = CHIP_POLARIS10,
.asic_name = "polaris10",
.gfx_target_version = 80003,
.max_pasid_bits = 16,
@@ -214,7 +206,6 @@ static const struct kfd_device_info polaris10_device_info = {
};
static const struct kfd_device_info polaris10_vf_device_info = {
.asic_family = CHIP_POLARIS10,
.asic_name = "polaris10",
.gfx_target_version = 80003,
.max_pasid_bits = 16,
@@ -233,7 +224,6 @@ static const struct kfd_device_info polaris10_vf_device_info = {
};
static const struct kfd_device_info polaris11_device_info = {
.asic_family = CHIP_POLARIS11,
.asic_name = "polaris11",
.gfx_target_version = 80003,
.max_pasid_bits = 16,
@@ -252,7 +242,6 @@ static const struct kfd_device_info polaris11_device_info = {
};
static const struct kfd_device_info polaris12_device_info = {
.asic_family = CHIP_POLARIS12,
.asic_name = "polaris12",
.gfx_target_version = 80003,
.max_pasid_bits = 16,
@@ -271,7 +260,6 @@ static const struct kfd_device_info polaris12_device_info = {
};
static const struct kfd_device_info vegam_device_info = {
.asic_family = CHIP_VEGAM,
.asic_name = "vegam",
.gfx_target_version = 80003,
.max_pasid_bits = 16,
@@ -290,7 +278,6 @@ static const struct kfd_device_info vegam_device_info = {
};
static const struct kfd_device_info vega10_device_info = {
.asic_family = CHIP_VEGA10,
.asic_name = "vega10",
.gfx_target_version = 90000,
.max_pasid_bits = 16,
@@ -309,7 +296,6 @@ static const struct kfd_device_info vega10_device_info = {
};
static const struct kfd_device_info vega10_vf_device_info = {
.asic_family = CHIP_VEGA10,
.asic_name = "vega10",
.gfx_target_version = 90000,
.max_pasid_bits = 16,
@@ -328,7 +314,6 @@ static const struct kfd_device_info vega10_vf_device_info = {
};
static const struct kfd_device_info vega12_device_info = {
.asic_family = CHIP_VEGA12,
.asic_name = "vega12",
.gfx_target_version = 90004,
.max_pasid_bits = 16,
@@ -347,7 +332,6 @@ static const struct kfd_device_info vega12_device_info = {
};
static const struct kfd_device_info vega20_device_info = {
.asic_family = CHIP_VEGA20,
.asic_name = "vega20",
.gfx_target_version = 90006,
.max_pasid_bits = 16,
@@ -366,7 +350,6 @@ static const struct kfd_device_info vega20_device_info = {
};
static const struct kfd_device_info arcturus_device_info = {
.asic_family = CHIP_ARCTURUS,
.asic_name = "arcturus",
.gfx_target_version = 90008,
.max_pasid_bits = 16,
@@ -385,7 +368,6 @@ static const struct kfd_device_info arcturus_device_info = {
};
static const struct kfd_device_info aldebaran_device_info = {
.asic_family = CHIP_ALDEBARAN,
.asic_name = "aldebaran",
.gfx_target_version = 90010,
.max_pasid_bits = 16,
@@ -404,7 +386,6 @@ static const struct kfd_device_info aldebaran_device_info = {
};
static const struct kfd_device_info renoir_device_info = {
.asic_family = CHIP_RENOIR,
.asic_name = "renoir",
.gfx_target_version = 90012,
.max_pasid_bits = 16,
@@ -423,7 +404,6 @@ static const struct kfd_device_info renoir_device_info = {
};
static const struct kfd_device_info navi10_device_info = {
.asic_family = CHIP_NAVI10,
.asic_name = "navi10",
.gfx_target_version = 100100,
.max_pasid_bits = 16,
@@ -443,7 +423,6 @@ static const struct kfd_device_info navi10_device_info = {
};
static const struct kfd_device_info navi12_device_info = {
.asic_family = CHIP_NAVI12,
.asic_name = "navi12",
.gfx_target_version = 100101,
.max_pasid_bits = 16,
@@ -463,7 +442,6 @@ static const struct kfd_device_info navi12_device_info = {
};
static const struct kfd_device_info navi14_device_info = {
.asic_family = CHIP_NAVI14,
.asic_name = "navi14",
.gfx_target_version = 100102,
.max_pasid_bits = 16,
@@ -483,7 +461,6 @@ static const struct kfd_device_info navi14_device_info = {
};
static const struct kfd_device_info sienna_cichlid_device_info = {
.asic_family = CHIP_SIENNA_CICHLID,
.asic_name = "sienna_cichlid",
.gfx_target_version = 100300,
.max_pasid_bits = 16,
@@ -503,7 +480,6 @@ static const struct kfd_device_info sienna_cichlid_device_info = {
};
static const struct kfd_device_info navy_flounder_device_info = {
.asic_family = CHIP_NAVY_FLOUNDER,
.asic_name = "navy_flounder",
.gfx_target_version = 100301,
.max_pasid_bits = 16,
@@ -523,7 +499,6 @@ static const struct kfd_device_info navy_flounder_device_info = {
};
static const struct kfd_device_info vangogh_device_info = {
.asic_family = CHIP_VANGOGH,
.asic_name = "vangogh",
.gfx_target_version = 100303,
.max_pasid_bits = 16,
@@ -543,7 +518,6 @@ static const struct kfd_device_info vangogh_device_info = {
};
static const struct kfd_device_info dimgrey_cavefish_device_info = {
.asic_family = CHIP_DIMGREY_CAVEFISH,
.asic_name = "dimgrey_cavefish",
.gfx_target_version = 100302,
.max_pasid_bits = 16,
@@ -563,7 +537,6 @@ static const struct kfd_device_info dimgrey_cavefish_device_info = {
};
static const struct kfd_device_info beige_goby_device_info = {
.asic_family = CHIP_BEIGE_GOBY,
.asic_name = "beige_goby",
.gfx_target_version = 100304,
.max_pasid_bits = 16,
@@ -583,7 +556,6 @@ static const struct kfd_device_info beige_goby_device_info = {
};
static const struct kfd_device_info yellow_carp_device_info = {
.asic_family = CHIP_YELLOW_CARP,
.asic_name = "yellow_carp",
.gfx_target_version = 100305,
.max_pasid_bits = 16,
@@ -603,7 +575,6 @@ static const struct kfd_device_info yellow_carp_device_info = {
};
static const struct kfd_device_info cyan_skillfish_device_info = {
.asic_family = CHIP_CYAN_SKILLFISH,
.asic_name = "cyan_skillfish",
.gfx_target_version = 100103,
.max_pasid_bits = 16,
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+6 -6
View File
@@ -292,7 +292,7 @@ static void deallocate_vmid(struct device_queue_manager *dqm,
struct queue *q)
{
/* On GFX v7, CP doesn't flush TC at dequeue */
if (q->device->device_info->asic_family == CHIP_HAWAII)
if (q->device->adev->asic_type == CHIP_HAWAII)
if (flush_texture_cache_nocpsch(q->device, qpd))
pr_err("Failed to flush TC\n");
@@ -1016,7 +1016,7 @@ static int start_nocpsch(struct device_queue_manager *dqm)
pr_info("SW scheduler is used");
init_interrupts(dqm);
if (dqm->dev->device_info->asic_family == CHIP_HAWAII)
if (dqm->dev->adev->asic_type == CHIP_HAWAII)
return pm_init(&dqm->packet_mgr, dqm);
dqm->sched_running = true;
@@ -1025,7 +1025,7 @@ static int start_nocpsch(struct device_queue_manager *dqm)
static int stop_nocpsch(struct device_queue_manager *dqm)
{
if (dqm->dev->device_info->asic_family == CHIP_HAWAII)
if (dqm->dev->adev->asic_type == CHIP_HAWAII)
pm_uninit(&dqm->packet_mgr, false);
dqm->sched_running = false;
@@ -1861,7 +1861,7 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
if (!dqm)
return NULL;
switch (dev->device_info->asic_family) {
switch (dev->adev->asic_type) {
/* HWS is not available on Hawaii. */
case CHIP_HAWAII:
/* HWS depends on CWSR for timely dequeue. CWSR is not
@@ -1924,7 +1924,7 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
goto out_free;
}
switch (dev->device_info->asic_family) {
switch (dev->adev->asic_type) {
case CHIP_CARRIZO:
device_queue_manager_init_vi(&dqm->asic_ops);
break;
@@ -1953,7 +1953,7 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
device_queue_manager_init_v9(&dqm->asic_ops);
else {
WARN(1, "Unexpected ASIC family %u",
dev->device_info->asic_family);
dev->adev->asic_type);
goto out_free;
}
}
drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
+2 -2
View File
@@ -394,7 +394,7 @@ int kfd_init_apertures(struct kfd_process *process)
pdd->gpuvm_base = pdd->gpuvm_limit = 0;
pdd->scratch_base = pdd->scratch_limit = 0;
} else {
switch (dev->device_info->asic_family) {
switch (dev->adev->asic_type) {
case CHIP_KAVERI:
case CHIP_HAWAII:
case CHIP_CARRIZO:
@@ -411,7 +411,7 @@ int kfd_init_apertures(struct kfd_process *process)
kfd_init_apertures_v9(pdd, id);
else {
WARN(1, "Unexpected ASIC family %u",
dev->device_info->asic_family);
dev->adev->asic_type);
return -EINVAL;
}
}
drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
+1 -1
View File
@@ -91,7 +91,7 @@ static bool kq_initialize(struct kernel_queue *kq, struct kfd_dev *dev,
kq->pq_gpu_addr = kq->pq->gpu_addr;
/* For CIK family asics, kq->eop_mem is not needed */
if (dev->device_info->asic_family > CHIP_MULLINS) {
if (dev->adev->asic_type > CHIP_MULLINS) {
retval = kfd_gtt_sa_allocate(dev, PAGE_SIZE, &kq->eop_mem);
if (retval != 0)
goto err_eop_allocate_vidmem;
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
+2 -2
View File
@@ -223,7 +223,7 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
{
switch (dqm->dev->device_info->asic_family) {
switch (dqm->dev->adev->asic_type) {
case CHIP_KAVERI:
case CHIP_HAWAII:
/* PM4 packet structures on CIK are the same as on VI */
@@ -243,7 +243,7 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
pm->pmf = &kfd_v9_pm_funcs;
else {
WARN(1, "Unexpected ASIC family %u",
dqm->dev->device_info->asic_family);
dqm->dev->adev->asic_type);
return -EINVAL;
}
}
drivers/gpu/drm/amd/amdkfd/kfd_priv.h
-1
View File
@@ -195,7 +195,6 @@ struct kfd_event_interrupt_class {
};
struct kfd_device_info {
enum amd_asic_type asic_family;
const char *asic_name;
uint32_t gfx_target_version;
const struct kfd_event_interrupt_class *event_interrupt_class;
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+5 -6
View File
@@ -515,7 +515,7 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
HSA_CAP_WATCH_POINTS_TOTALBITS_MASK);
}
if (dev->gpu->device_info->asic_family == CHIP_TONGA)
if (dev->gpu->adev->asic_type == CHIP_TONGA)
dev->node_props.capability |=
HSA_CAP_AQL_QUEUE_DOUBLE_MAP;
@@ -1217,8 +1217,7 @@ static void kfd_set_iolink_no_atomics(struct kfd_topology_device *dev,
/* set gpu (dev) flags. */
} else {
if (!dev->gpu->pci_atomic_requested ||
dev->gpu->device_info->asic_family ==
CHIP_HAWAII)
dev->gpu->adev->asic_type == CHIP_HAWAII)
link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT |
CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT;
}
@@ -1406,7 +1405,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
kfd_fill_mem_clk_max_info(dev);
kfd_fill_iolink_non_crat_info(dev);
switch (dev->gpu->device_info->asic_family) {
switch (dev->gpu->adev->asic_type) {
case CHIP_KAVERI:
case CHIP_HAWAII:
case CHIP_TONGA:
@@ -1432,7 +1431,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
else
WARN(1, "Unexpected ASIC family %u",
dev->gpu->device_info->asic_family);
dev->gpu->adev->asic_type);
}
/*
@@ -1449,7 +1448,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
* because it doesn't consider masked out CUs
* max_waves_per_simd: Carrizo reports wrong max_waves_per_simd
*/
if (dev->gpu->device_info->asic_family == CHIP_CARRIZO) {
if (dev->gpu->adev->asic_type == CHIP_CARRIZO) {
dev->node_props.simd_count =
cu_info.simd_per_cu * cu_info.cu_active_number;
dev->node_props.max_waves_per_simd = 10;