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drm/xe: Cleanup style warnings and errors

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Fix 6 errors and 20 warnings reported by checkpatch.pl.

Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Francois Dugast
2023-07-19 13:51:08 +00:00
committed by Rodrigo Vivi
parent ea82d5aab5
commit 72e8d73b71
10 changed files with 39 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/xe/xe_bo.c
+1 -1
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@@ -1831,7 +1831,7 @@ int xe_bo_lock(struct xe_bo *bo, struct ww_acquire_ctx *ww,
XE_BUG_ON(!ww);
tv_bo.num_shared = num_resv;
tv_bo.bo = &bo->ttm;;
tv_bo.bo = &bo->ttm;
list_add_tail(&tv_bo.head, &objs);
return ttm_eu_reserve_buffers(ww, &objs, intr, &dups);
drivers/gpu/drm/xe/xe_gt_mcr.c
+1 -1
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@@ -273,7 +273,7 @@ static void init_steering_inst0(struct xe_gt *gt)
static const struct {
const char *name;
void (*init)(struct xe_gt *);
void (*init)(struct xe_gt *gt);
} xe_steering_types[] = {
[L3BANK] = { "L3BANK", init_steering_l3bank },
[MSLICE] = { "MSLICE", init_steering_mslice },
drivers/gpu/drm/xe/xe_gt_sysfs.c
+1 -3
View File
@@ -37,10 +37,8 @@ void xe_gt_sysfs_init(struct xe_gt *gt)
int err;
kg = kzalloc(sizeof(*kg), GFP_KERNEL);
if (!kg) {
drm_warn(&xe->drm, "Allocating kobject failed.\n");
if (!kg)
return;
}
kobject_init(&kg->base, &xe_gt_sysfs_kobj_type);
kg->gt = gt;
drivers/gpu/drm/xe/xe_guc.c
+6 -8
View File
@@ -396,14 +396,12 @@ static int guc_wait_ucode(struct xe_guc *guc)
struct drm_printer p = drm_info_printer(drm->dev);
drm_info(drm, "GuC load failed: status = 0x%08X\n", status);
drm_info(drm, "GuC load failed: status: Reset = %d, "
"BootROM = 0x%02X, UKernel = 0x%02X, "
"MIA = 0x%02X, Auth = 0x%02X\n",
REG_FIELD_GET(GS_MIA_IN_RESET, status),
REG_FIELD_GET(GS_BOOTROM_MASK, status),
REG_FIELD_GET(GS_UKERNEL_MASK, status),
REG_FIELD_GET(GS_MIA_MASK, status),
REG_FIELD_GET(GS_AUTH_STATUS_MASK, status));
drm_info(drm, "GuC load failed: status: Reset = %d, BootROM = 0x%02X, UKernel = 0x%02X, MIA = 0x%02X, Auth = 0x%02X\n",
REG_FIELD_GET(GS_MIA_IN_RESET, status),
REG_FIELD_GET(GS_BOOTROM_MASK, status),
REG_FIELD_GET(GS_UKERNEL_MASK, status),
REG_FIELD_GET(GS_MIA_MASK, status),
REG_FIELD_GET(GS_AUTH_STATUS_MASK, status));
if ((status & GS_BOOTROM_MASK) == GS_BOOTROM_RSA_FAILED) {
drm_info(drm, "GuC firmware signature verification failed\n");
drivers/gpu/drm/xe/xe_hw_engine_types.h
+1 -1
View File
@@ -104,7 +104,7 @@ struct xe_hw_engine {
/** @fence_irq: fence IRQ to run when a hw engine IRQ is received */
struct xe_hw_fence_irq *fence_irq;
/** @irq_handler: IRQ handler to run when hw engine IRQ is received */
void (*irq_handler)(struct xe_hw_engine *, u16);
void (*irq_handler)(struct xe_hw_engine *hwe, u16 intr_vec);
/** @engine_id: id for this hw engine */
enum xe_hw_engine_id engine_id;
};
drivers/gpu/drm/xe/xe_map.h
+1 -1
View File
@@ -1,4 +1,4 @@
// SPDX-License-Identifier: MIT
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2022 Intel Corporation
*/
drivers/gpu/drm/xe/xe_migrate.c
+1 -1
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@@ -475,7 +475,7 @@ static void emit_pte(struct xe_migrate *m,
bb->cs[bb->len++] = lower_32_bits(addr);
bb->cs[bb->len++] = upper_32_bits(addr);
xe_res_next(cur, min(size, (u32)PAGE_SIZE));
xe_res_next(cur, min_t(u32, size, PAGE_SIZE));
cur_ofs += 8;
}
}
drivers/gpu/drm/xe/xe_reg_whitelist.c
+18 -6
View File
@@ -89,18 +89,30 @@ void xe_reg_whitelist_print_entry(struct drm_printer *p, unsigned int indent,
deny = val & RING_FORCE_TO_NONPRIV_DENY;
switch (val & RING_FORCE_TO_NONPRIV_RANGE_MASK) {
case RING_FORCE_TO_NONPRIV_RANGE_4: range_bit = 4; break;
case RING_FORCE_TO_NONPRIV_RANGE_16: range_bit = 6; break;
case RING_FORCE_TO_NONPRIV_RANGE_64: range_bit = 8; break;
case RING_FORCE_TO_NONPRIV_RANGE_4:
range_bit = 4;
break;
case RING_FORCE_TO_NONPRIV_RANGE_16:
range_bit = 6;
break;
case RING_FORCE_TO_NONPRIV_RANGE_64:
range_bit = 8;
break;
}
range_start = reg & REG_GENMASK(25, range_bit);
range_end = range_start | REG_GENMASK(range_bit, 0);
switch (val & RING_FORCE_TO_NONPRIV_ACCESS_MASK) {
case RING_FORCE_TO_NONPRIV_ACCESS_RW: access_str = "rw"; break;
case RING_FORCE_TO_NONPRIV_ACCESS_RD: access_str = "read"; break;
case RING_FORCE_TO_NONPRIV_ACCESS_WR: access_str = "write"; break;
case RING_FORCE_TO_NONPRIV_ACCESS_RW:
access_str = "rw";
break;
case RING_FORCE_TO_NONPRIV_ACCESS_RD:
access_str = "read";
break;
case RING_FORCE_TO_NONPRIV_ACCESS_WR:
access_str = "write";
break;
}
drm_printf_indent(p, indent, "REG[0x%x-0x%x]: %s %s access\n",
drivers/gpu/drm/xe/xe_res_cursor.h
+5 -6
View File
@@ -51,15 +51,14 @@ struct xe_res_cursor {
static struct drm_buddy *xe_res_get_buddy(struct ttm_resource *res)
{
struct xe_device *xe = ttm_to_xe_device(res->bo->bdev);
struct ttm_resource_manager *mgr;
if (res->mem_type != XE_PL_STOLEN) {
if (res->mem_type != XE_PL_STOLEN)
return &xe->tiles[res->mem_type - XE_PL_VRAM0].mem.vram_mgr->mm;
} else {
struct ttm_resource_manager *mgr =
ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
return &to_xe_ttm_vram_mgr(mgr)->mm;
}
mgr = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
return &to_xe_ttm_vram_mgr(mgr)->mm;
}
/**
drivers/gpu/drm/xe/xe_wopcm.c
+4 -6
View File
@@ -47,12 +47,10 @@
*/
/* Default WOPCM size is 2MB from Gen11, 1MB on previous platforms */
#define DGFX_WOPCM_SIZE SZ_4M /* FIXME: Larger size require
for 2 tile PVC, do a proper
probe sooner or later */
#define MTL_WOPCM_SIZE SZ_4M /* FIXME: Larger size require
for MTL, do a proper probe
sooner or later */
/* FIXME: Larger size require for 2 tile PVC, do a proper probe sooner or later */
#define DGFX_WOPCM_SIZE SZ_4M
/* FIXME: Larger size require for MTL, do a proper probe sooner or later */
#define MTL_WOPCM_SIZE SZ_4M
#define GEN11_WOPCM_SIZE SZ_2M
#define GEN12_MAX_WOPCM_SIZE SZ_8M