wifi: wilc1000: remove use of has_thrpt_enh3 flag
The 'enhance throughput flow' algorithm is used by default. So older sections of the code are removed so as to always use this new algorithm. Signed-off-by: Prasurjya Rohan Saikia <prasurjya.rohansaikia@microchip.com> Acked-by: Ajay Kathat <ajay.kathat@microchip.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230710094401.235222-1-prasurjya.rohansaikia@microchip.com
This commit is contained in:
committed by
Kalle Valo
parent
023d2f14ab
commit
646462f860
@@ -28,7 +28,6 @@ struct wilc_sdio {
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bool irq_gpio;
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u32 block_size;
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bool isinit;
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int has_thrpt_enh3;
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u8 *cmd53_buf;
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};
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@@ -722,21 +721,12 @@ static int wilc_sdio_init(struct wilc *wilc, bool resume)
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* make sure can read back chip id correctly
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**/
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if (!resume) {
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int rev;
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ret = wilc_sdio_read_reg(wilc, WILC_CHIPID, &chipid);
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if (ret) {
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dev_err(&func->dev, "Fail cmd read chip id...\n");
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return ret;
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}
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dev_err(&func->dev, "chipid (%08x)\n", chipid);
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rev = FIELD_GET(WILC_CHIP_REV_FIELD, chipid);
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if (rev > FIELD_GET(WILC_CHIP_REV_FIELD, WILC_1000_BASE_ID_2A))
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sdio_priv->has_thrpt_enh3 = 1;
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else
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sdio_priv->has_thrpt_enh3 = 0;
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dev_info(&func->dev, "has_thrpt_enh3 = %d...\n",
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sdio_priv->has_thrpt_enh3);
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}
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sdio_priv->isinit = true;
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@@ -809,102 +799,29 @@ static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val)
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struct sdio_func *func = dev_to_sdio_func(wilc->dev);
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struct wilc_sdio *sdio_priv = wilc->bus_data;
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int ret;
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int vmm_ctl;
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u32 reg = 0;
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if (sdio_priv->has_thrpt_enh3) {
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u32 reg = 0;
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if (sdio_priv->irq_gpio)
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reg = val & (BIT(MAX_NUM_INT) - 1);
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if (sdio_priv->irq_gpio)
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reg = val & (BIT(MAX_NUM_INT) - 1);
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/* select VMM table 0 */
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if (val & SEL_VMM_TBL0)
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reg |= BIT(5);
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/* select VMM table 1 */
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if (val & SEL_VMM_TBL1)
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reg |= BIT(6);
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/* enable VMM */
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if (val & EN_VMM)
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reg |= BIT(7);
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if (reg) {
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struct sdio_cmd52 cmd;
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cmd.read_write = 1;
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cmd.function = 0;
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cmd.raw = 0;
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cmd.address = WILC_SDIO_IRQ_CLEAR_FLAG_REG;
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cmd.data = reg;
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ret = wilc_sdio_cmd52(wilc, &cmd);
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if (ret) {
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dev_err(&func->dev,
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"Failed cmd52, set (%02x) data (%d) ...\n",
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cmd.address, __LINE__);
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return ret;
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}
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}
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return 0;
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}
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if (sdio_priv->irq_gpio) {
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/* has_thrpt_enh2 uses register 0xf8 to clear interrupts. */
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/*
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* Cannot clear multiple interrupts.
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* Must clear each interrupt individually.
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*/
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u32 flags;
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int i;
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flags = val & (BIT(MAX_NUM_INT) - 1);
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for (i = 0; i < NUM_INT_EXT && flags; i++) {
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if (flags & BIT(i)) {
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struct sdio_cmd52 cmd;
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cmd.read_write = 1;
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cmd.function = 0;
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cmd.raw = 0;
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cmd.address = WILC_SDIO_IRQ_CLEAR_FLAG_REG;
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cmd.data = BIT(i);
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ret = wilc_sdio_cmd52(wilc, &cmd);
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if (ret) {
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dev_err(&func->dev,
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"Failed cmd52, set (%02x) data (%d) ...\n",
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cmd.address, __LINE__);
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return ret;
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}
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flags &= ~BIT(i);
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}
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}
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for (i = NUM_INT_EXT; i < MAX_NUM_INT && flags; i++) {
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if (flags & BIT(i)) {
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dev_err(&func->dev,
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"Unexpected interrupt cleared %d...\n",
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i);
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flags &= ~BIT(i);
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}
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}
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}
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vmm_ctl = 0;
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/* select VMM table 0 */
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if (val & SEL_VMM_TBL0)
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vmm_ctl |= BIT(0);
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reg |= BIT(5);
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/* select VMM table 1 */
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if (val & SEL_VMM_TBL1)
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vmm_ctl |= BIT(1);
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reg |= BIT(6);
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/* enable VMM */
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if (val & EN_VMM)
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vmm_ctl |= BIT(2);
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if (vmm_ctl) {
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reg |= BIT(7);
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if (reg) {
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struct sdio_cmd52 cmd;
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cmd.read_write = 1;
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cmd.function = 0;
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cmd.raw = 0;
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cmd.address = WILC_SDIO_VMM_TBL_CTRL_REG;
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cmd.data = vmm_ctl;
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cmd.address = WILC_SDIO_IRQ_CLEAR_FLAG_REG;
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cmd.data = reg;
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ret = wilc_sdio_cmd52(wilc, &cmd);
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if (ret) {
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dev_err(&func->dev,
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