iommu/vt-d: Check if SVA is supported when attaching the SVA domain
Attach of a SVA domain should fail if SVA is not supported, move the check for SVA support out of IOMMU_DEV_FEAT_SVA and into attach. Also check when allocating a SVA domain to match other drivers. Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org> Link: https://lore.kernel.org/r/20250228092631.3425464-3-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
committed by
Joerg Roedel
parent
a8653e5cc2
commit
607ba1bb09
@@ -3855,41 +3855,6 @@ static struct iommu_group *intel_iommu_device_group(struct device *dev)
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return generic_device_group(dev);
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}
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static int intel_iommu_enable_sva(struct device *dev)
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{
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struct device_domain_info *info = dev_iommu_priv_get(dev);
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struct intel_iommu *iommu;
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if (!info || dmar_disabled)
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return -EINVAL;
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iommu = info->iommu;
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if (!iommu)
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return -EINVAL;
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if (!(iommu->flags & VTD_FLAG_SVM_CAPABLE))
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return -ENODEV;
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if (!info->pasid_enabled || !info->ats_enabled)
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return -EINVAL;
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/*
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* Devices having device-specific I/O fault handling should not
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* support PCI/PRI. The IOMMU side has no means to check the
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* capability of device-specific IOPF. Therefore, IOMMU can only
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* default that if the device driver enables SVA on a non-PRI
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* device, it will handle IOPF in its own way.
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*/
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if (!info->pri_supported)
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return 0;
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/* Devices supporting PRI should have it enabled. */
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if (!info->pri_enabled)
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return -EINVAL;
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return 0;
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}
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static int context_flip_pri(struct device_domain_info *info, bool enable)
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{
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struct intel_iommu *iommu = info->iommu;
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@@ -4010,7 +3975,7 @@ intel_iommu_dev_enable_feat(struct device *dev, enum iommu_dev_features feat)
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return intel_iommu_enable_iopf(dev);
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case IOMMU_DEV_FEAT_SVA:
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return intel_iommu_enable_sva(dev);
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return 0;
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default:
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return -ENODEV;
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@@ -110,6 +110,41 @@ static const struct mmu_notifier_ops intel_mmuops = {
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.free_notifier = intel_mm_free_notifier,
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};
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static int intel_iommu_sva_supported(struct device *dev)
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{
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struct device_domain_info *info = dev_iommu_priv_get(dev);
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struct intel_iommu *iommu;
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if (!info || dmar_disabled)
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return -EINVAL;
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iommu = info->iommu;
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if (!iommu)
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return -EINVAL;
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if (!(iommu->flags & VTD_FLAG_SVM_CAPABLE))
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return -ENODEV;
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if (!info->pasid_enabled || !info->ats_enabled)
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return -EINVAL;
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/*
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* Devices having device-specific I/O fault handling should not
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* support PCI/PRI. The IOMMU side has no means to check the
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* capability of device-specific IOPF. Therefore, IOMMU can only
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* default that if the device driver enables SVA on a non-PRI
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* device, it will handle IOPF in its own way.
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*/
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if (!info->pri_supported)
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return 0;
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/* Devices supporting PRI should have it enabled. */
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if (!info->pri_enabled)
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return -EINVAL;
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return 0;
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}
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static int intel_svm_set_dev_pasid(struct iommu_domain *domain,
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struct device *dev, ioasid_t pasid,
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struct iommu_domain *old)
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@@ -121,6 +156,10 @@ static int intel_svm_set_dev_pasid(struct iommu_domain *domain,
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unsigned long sflags;
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int ret = 0;
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ret = intel_iommu_sva_supported(dev);
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if (ret)
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return ret;
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dev_pasid = domain_add_dev_pasid(domain, dev, pasid);
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if (IS_ERR(dev_pasid))
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return PTR_ERR(dev_pasid);
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@@ -161,6 +200,10 @@ struct iommu_domain *intel_svm_domain_alloc(struct device *dev,
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struct dmar_domain *domain;
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int ret;
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ret = intel_iommu_sva_supported(dev);
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if (ret)
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return ERR_PTR(ret);
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domain = kzalloc(sizeof(*domain), GFP_KERNEL);
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if (!domain)
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return ERR_PTR(-ENOMEM);
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