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drm/nouveau/top: switch to instanced constructor

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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs
2020-12-04 12:53:38 +10:00
parent 9aad54d5c7
commit 601c2a06d2
8 changed files with 36 additions and 38 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
-2
View File
@@ -60,7 +60,6 @@ struct nvkm_device {
struct notifier_block nb;
} acpi;
struct nvkm_top *top;
struct nvkm_volt *volt;
struct nvkm_engine *bsp;
@@ -125,7 +124,6 @@ struct nvkm_device_chip {
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
int (*top )(struct nvkm_device *, int idx, struct nvkm_top **);
int (*volt )(struct nvkm_device *, int idx, struct nvkm_volt **);
int (*bsp )(struct nvkm_device *, int idx, struct nvkm_engine **);
drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
+1
View File
@@ -2,6 +2,7 @@
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_PCI , struct nvkm_pci , pci)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_VBIOS , struct nvkm_bios , bios)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_DEVINIT , struct nvkm_devinit , devinit)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_TOP , struct nvkm_top , top)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_IBUS , struct nvkm_subdev , ibus)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GPIO , struct nvkm_gpio , gpio)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_I2C , struct nvkm_i2c , i2c)
drivers/gpu/drm/nouveau/include/nvkm/subdev/top.h
+1 -1
View File
@@ -29,5 +29,5 @@ int nvkm_top_fault_id(struct nvkm_device *, enum nvkm_devidx);
enum nvkm_devidx nvkm_top_fault(struct nvkm_device *, int fault);
enum nvkm_devidx nvkm_top_engine(struct nvkm_device *, int, int *runl, int *engn);
int gk104_top_new(struct nvkm_device *, int, struct nvkm_top **);
int gk104_top_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_top **);
#endif
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
-1
View File
@@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
#include <core/layout.h>
#undef NVKM_LAYOUT_ONCE
#undef NVKM_LAYOUT_INST
[NVKM_SUBDEV_TOP ] = "top",
[NVKM_SUBDEV_VOLT ] = "volt",
[NVKM_ENGINE_BSP ] = "bsp",
[NVKM_ENGINE_CE0 ] = "ce0",
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+27 -28
View File
@@ -1685,7 +1685,7 @@ nve4_chipset = {
.pmu = { 0x00000001, gk104_pmu_new },
.therm = { 0x00000001, gk104_therm_new },
.timer = { 0x00000001, nv41_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gk104_ce_new,
.ce[1] = gk104_ce_new,
@@ -1724,7 +1724,7 @@ nve6_chipset = {
.pmu = { 0x00000001, gk104_pmu_new },
.therm = { 0x00000001, gk104_therm_new },
.timer = { 0x00000001, nv41_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gk104_ce_new,
.ce[1] = gk104_ce_new,
@@ -1763,7 +1763,7 @@ nve7_chipset = {
.pmu = { 0x00000001, gk104_pmu_new },
.therm = { 0x00000001, gk104_therm_new },
.timer = { 0x00000001, nv41_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gk104_ce_new,
.ce[1] = gk104_ce_new,
@@ -1794,7 +1794,7 @@ nvea_chipset = {
.mmu = { 0x00000001, gk20a_mmu_new },
.pmu = { 0x00000001, gk20a_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk20a_volt_new,
.ce[2] = gk104_ce_new,
.dma = gf119_dma_new,
@@ -1827,7 +1827,7 @@ nvf0_chipset = {
.pmu = { 0x00000001, gk110_pmu_new },
.therm = { 0x00000001, gk104_therm_new },
.timer = { 0x00000001, nv41_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gk104_ce_new,
.ce[1] = gk104_ce_new,
@@ -1865,7 +1865,7 @@ nvf1_chipset = {
.pmu = { 0x00000001, gk110_pmu_new },
.therm = { 0x00000001, gk104_therm_new },
.timer = { 0x00000001, nv41_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gk104_ce_new,
.ce[1] = gk104_ce_new,
@@ -1903,7 +1903,7 @@ nv106_chipset = {
.pmu = { 0x00000001, gk208_pmu_new },
.therm = { 0x00000001, gk104_therm_new },
.timer = { 0x00000001, nv41_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gk104_ce_new,
.ce[1] = gk104_ce_new,
@@ -1941,7 +1941,7 @@ nv108_chipset = {
.pmu = { 0x00000001, gk208_pmu_new },
.therm = { 0x00000001, gk104_therm_new },
.timer = { 0x00000001, nv41_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gk104_ce_new,
.ce[1] = gk104_ce_new,
@@ -1979,7 +1979,7 @@ nv117_chipset = {
.pmu = { 0x00000001, gm107_pmu_new },
.therm = { 0x00000001, gm107_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gm107_ce_new,
.ce[2] = gm107_ce_new,
@@ -2015,7 +2015,7 @@ nv118_chipset = {
.pmu = { 0x00000001, gm107_pmu_new },
.therm = { 0x00000001, gm107_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gm107_ce_new,
.ce[2] = gm107_ce_new,
@@ -2049,7 +2049,7 @@ nv120_chipset = {
.pmu = { 0x00000001, gm200_pmu_new },
.therm = { 0x00000001, gm200_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gm200_ce_new,
.ce[1] = gm200_ce_new,
@@ -2087,7 +2087,7 @@ nv124_chipset = {
.pmu = { 0x00000001, gm200_pmu_new },
.therm = { 0x00000001, gm200_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gm200_ce_new,
.ce[1] = gm200_ce_new,
@@ -2125,7 +2125,7 @@ nv126_chipset = {
.pmu = { 0x00000001, gm200_pmu_new },
.therm = { 0x00000001, gm200_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.volt = gk104_volt_new,
.ce[0] = gm200_ce_new,
.ce[1] = gm200_ce_new,
@@ -2155,7 +2155,7 @@ nv12b_chipset = {
.mmu = { 0x00000001, gm20b_mmu_new },
.pmu = { 0x00000001, gm20b_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[2] = gm200_ce_new,
.volt = gm20b_volt_new,
.dma = gf119_dma_new,
@@ -2186,7 +2186,7 @@ nv130_chipset = {
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gm200_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = gp100_ce_new,
.ce[1] = gp100_ce_new,
.ce[2] = gp100_ce_new,
@@ -2226,7 +2226,7 @@ nv132_chipset = {
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = gp102_ce_new,
.ce[1] = gp102_ce_new,
.ce[2] = gp102_ce_new,
@@ -2264,7 +2264,7 @@ nv134_chipset = {
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = gp102_ce_new,
.ce[1] = gp102_ce_new,
.ce[2] = gp102_ce_new,
@@ -2302,7 +2302,7 @@ nv136_chipset = {
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = gp102_ce_new,
.ce[1] = gp102_ce_new,
.ce[2] = gp102_ce_new,
@@ -2339,7 +2339,7 @@ nv137_chipset = {
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = gp102_ce_new,
.ce[1] = gp102_ce_new,
.ce[2] = gp102_ce_new,
@@ -2377,7 +2377,7 @@ nv138_chipset = {
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = gp102_ce_new,
.ce[1] = gp102_ce_new,
.ce[2] = gp102_ce_new,
@@ -2407,7 +2407,7 @@ nv13b_chipset = {
.mmu = { 0x00000001, gp10b_mmu_new },
.pmu = { 0x00000001, gp10b_pmu_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = gp100_ce_new,
.dma = gf119_dma_new,
.fifo = gp10b_fifo_new,
@@ -2438,7 +2438,7 @@ nv140_chipset = {
.pmu = { 0x00000001, gp102_pmu_new },
.therm = { 0x00000001, gp100_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.disp = gv100_disp_new,
.ce[0] = gv100_ce_new,
.ce[1] = gv100_ce_new,
@@ -2482,7 +2482,7 @@ nv162_chipset = {
.pmu = { 0x00000001, gp102_pmu_new },
.therm = { 0x00000001, gp100_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = tu102_ce_new,
.ce[1] = tu102_ce_new,
.ce[2] = tu102_ce_new,
@@ -2520,7 +2520,7 @@ nv164_chipset = {
.pmu = { 0x00000001, gp102_pmu_new },
.therm = { 0x00000001, gp100_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = tu102_ce_new,
.ce[1] = tu102_ce_new,
.ce[2] = tu102_ce_new,
@@ -2559,7 +2559,7 @@ nv166_chipset = {
.pmu = { 0x00000001, gp102_pmu_new },
.therm = { 0x00000001, gp100_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = tu102_ce_new,
.ce[1] = tu102_ce_new,
.ce[2] = tu102_ce_new,
@@ -2599,7 +2599,7 @@ nv167_chipset = {
.pmu = { 0x00000001, gp102_pmu_new },
.therm = { 0x00000001, gp100_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = tu102_ce_new,
.ce[1] = tu102_ce_new,
.ce[2] = tu102_ce_new,
@@ -2637,7 +2637,7 @@ nv168_chipset = {
.pmu = { 0x00000001, gp102_pmu_new },
.therm = { 0x00000001, gp100_therm_new },
.timer = { 0x00000001, gk20a_timer_new },
.top = gk104_top_new,
.top = { 0x00000001, gk104_top_new },
.ce[0] = tu102_ce_new,
.ce[1] = tu102_ce_new,
.ce[2] = tu102_ce_new,
@@ -3248,7 +3248,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
_(NVKM_SUBDEV_TOP , top);
_(NVKM_SUBDEV_VOLT , volt);
_(NVKM_ENGINE_BSP , bsp);
_(NVKM_ENGINE_CE0 , ce[0]);
drivers/gpu/drm/nouveau/nvkm/subdev/top/base.c
+2 -2
View File
@@ -165,12 +165,12 @@ nvkm_top = {
int
nvkm_top_new_(const struct nvkm_top_func *func, struct nvkm_device *device,
int index, struct nvkm_top **ptop)
enum nvkm_subdev_type type, int inst, struct nvkm_top **ptop)
{
struct nvkm_top *top;
if (!(top = *ptop = kzalloc(sizeof(*top), GFP_KERNEL)))
return -ENOMEM;
nvkm_subdev_ctor(&nvkm_top, device, index, &top->subdev);
nvkm_subdev_ctor(&nvkm_top, device, type, inst, &top->subdev);
top->func = func;
INIT_LIST_HEAD(&top->device);
return 0;
drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c
+3 -2
View File
@@ -110,7 +110,8 @@ gk104_top = {
};
int
gk104_top_new(struct nvkm_device *device, int index, struct nvkm_top **ptop)
gk104_top_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_top **ptop)
{
return nvkm_top_new_(&gk104_top, device, index, ptop);
return nvkm_top_new_(&gk104_top, device, type, inst, ptop);
}
drivers/gpu/drm/nouveau/nvkm/subdev/top/priv.h
+2 -2
View File
@@ -8,8 +8,8 @@ struct nvkm_top_func {
int (*oneinit)(struct nvkm_top *);
};
int nvkm_top_new_(const struct nvkm_top_func *, struct nvkm_device *,
int, struct nvkm_top **);
int nvkm_top_new_(const struct nvkm_top_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
struct nvkm_top **);
struct nvkm_top_device *nvkm_top_device_new(struct nvkm_top *);
#endif