arm64: dts: qcom: sm8350: add MDSS registers interconnect
Aside from the MDSS<->MEM interconnect, display devices have separate interconnect for register access. Add this interconnect to the display node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240804-sm8350-fixes-v1-9-1149dd8399fe@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Bjorn Andersson
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@@ -2490,8 +2490,12 @@
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reg-names = "mdss";
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interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>,
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<&mmss_noc MASTER_MDP1 0 &mc_virt SLAVE_EBI1 0>;
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interconnect-names = "mdp0-mem", "mdp1-mem";
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<&mmss_noc MASTER_MDP1 0 &mc_virt SLAVE_EBI1 0>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
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interconnect-names = "mdp0-mem",
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"mdp1-mem",
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"cpu-cfg";
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power-domains = <&dispcc MDSS_GDSC>;
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resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
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