drm/xe/adlp: Add revid => step mapping
Setup the mapping from PCI revid to IP stepping for ADL-P (and its RPL-P subplatform) in case this information becomes important for implementing workarounds. Bspec: 55376 Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20230419213703.3993439-1-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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@@ -60,6 +60,17 @@ static const struct xe_step_info adls_revids[] = {
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[0xC] = { COMMON_GT_MEDIA_STEP(D0), .display = STEP_C0 },
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};
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static const struct xe_step_info adlp_revids[] = {
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[0x0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_A0 },
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[0x4] = { COMMON_GT_MEDIA_STEP(B0), .display = STEP_B0 },
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[0x8] = { COMMON_GT_MEDIA_STEP(C0), .display = STEP_C0 },
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[0xC] = { COMMON_GT_MEDIA_STEP(C0), .display = STEP_D0 },
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};
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static const struct xe_step_info adlp_rpl_revids[] = {
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[0x4] = { COMMON_GT_MEDIA_STEP(C0), .display = STEP_E0 },
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};
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static const struct xe_step_info dg2_g10_revid_step_tbl[] = {
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[0x0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_A0 },
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[0x1] = { COMMON_GT_MEDIA_STEP(A1), .display = STEP_A0 },
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@@ -118,6 +129,12 @@ struct xe_step_info xe_step_get(struct xe_device *xe)
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} else if (xe->info.subplatform == XE_SUBPLATFORM_DG2_G12) {
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revids = dg2_g12_revid_step_tbl;
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size = ARRAY_SIZE(dg2_g12_revid_step_tbl);
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} else if (xe->info.subplatform == XE_SUBPLATFORM_ADLP_RPLU) {
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revids = adlp_rpl_revids;
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size = ARRAY_SIZE(adlp_rpl_revids);
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} else if (xe->info.platform == XE_ALDERLAKE_P) {
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revids = adlp_revids;
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size = ARRAY_SIZE(adlp_revids);
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} else if (xe->info.platform == XE_ALDERLAKE_S) {
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revids = adls_revids;
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size = ARRAY_SIZE(adls_revids);
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