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drm/xe/xe2: Add missing mocs entry

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Add index 4 so WB on both L3 and L4 can be used by userspace.

Bspec: 71582
Link: https://lore.kernel.org/all/7oqovb356dx2hm5muop3xjqr4kv7m5fzjisch3vmsmxm33ygtv@eib4jielia35/
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20231004150317.3473731-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Lucas De Marchi
2023-10-04 08:03:17 -07:00
committed by Rodrigo Vivi
parent a8e2e0d7fa
commit 5708a1080a
1 changed files with 2 additions and 0 deletions
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drivers/gpu/drm/xe/xe_mocs.c
+2
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@@ -385,6 +385,8 @@ static const struct xe_mocs_entry xe2_mocs_table[] = {
MOCS_ENTRY(2, IG_PAT | XE2_L3_3_UC | L4_0_WB, 0),
/* Uncached L3 + L4 */
MOCS_ENTRY(3, IG_PAT | XE2_L3_3_UC | L4_3_UC, 0),
/* Cached L3 + L4 */
MOCS_ENTRY(4, IG_PAT | XE2_L3_0_WB | L4_0_WB, 0),
};
static unsigned int get_mocs_settings(struct xe_device *xe,