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drm/msm/dpu: remove always-true argument of dpu_core_irq_read()

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The argument clear of the function dpu_core_irq_read() is always true.
Remove it.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/474697/
Link: https://lore.kernel.org/r/20220217043148.480898-3-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Dmitry Baryshkov
2022-02-17 07:31:44 +03:00
parent dd77ce4da8
commit 52db0f2b9f
3 changed files with 4 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
+1 -3
View File
@@ -33,13 +33,11 @@ irqreturn_t dpu_core_irq(struct msm_kms *kms);
* dpu_core_irq_read - IRQ helper function for reading IRQ status
* @dpu_kms: DPU handle
* @irq_idx: irq index
* @clear: True to clear the irq after read
* @return: non-zero if irq detected; otherwise no irq detected
*/
u32 dpu_core_irq_read(
struct dpu_kms *dpu_kms,
int irq_idx,
bool clear);
int irq_idx);
/**
* dpu_core_irq_register_callback - For registering callback function on IRQ
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+1 -2
View File
@@ -318,8 +318,7 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
wait_info);
if (ret <= 0) {
irq_status = dpu_core_irq_read(phys_enc->dpu_kms,
irq->irq_idx, true);
irq_status = dpu_core_irq_read(phys_enc->dpu_kms, irq->irq_idx);
if (irq_status) {
unsigned long flags;
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+2 -2
View File
@@ -363,7 +363,7 @@ static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms)
wmb();
}
u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear)
u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx)
{
struct dpu_hw_intr *intr = dpu_kms->hw_intr;
int reg_idx;
@@ -390,7 +390,7 @@ u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear)
intr_status = DPU_REG_READ(&intr->hw,
dpu_intr_set[reg_idx].status_off) &
DPU_IRQ_MASK(irq_idx);
if (intr_status && clear)
if (intr_status)
DPU_REG_WRITE(&intr->hw, dpu_intr_set[reg_idx].clr_off,
intr_status);