media: sun8i-di: Fix coefficient writes
[ Upstream commit794b581f8c] Currently coefficients are applied only once, since they don't change. However, this is done before enable bit is set and thus it doesn't get applied properly. Fix that by applying coefficients after enable bit is set. While this means that it will be done evey time, it doesn't bring much time penalty. Fixes:a4260ea495("media: sun4i: Add H3 deinterlace driver") Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Sasha Levin
parent
a62b9f3d7b
commit
4bdc1b352e
@@ -66,6 +66,7 @@ static void deinterlace_device_run(void *priv)
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struct vb2_v4l2_buffer *src, *dst;
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unsigned int hstep, vstep;
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dma_addr_t addr;
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int i;
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src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
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dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
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@@ -160,6 +161,26 @@ static void deinterlace_device_run(void *priv)
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deinterlace_write(dev, DEINTERLACE_CH1_HORZ_FACT, hstep);
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deinterlace_write(dev, DEINTERLACE_CH1_VERT_FACT, vstep);
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/* neutral filter coefficients */
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deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_COEF_ACCESS);
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readl_poll_timeout(dev->base + DEINTERLACE_STATUS, val,
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val & DEINTERLACE_STATUS_COEF_STATUS, 2, 40);
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for (i = 0; i < 32; i++) {
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deinterlace_write(dev, DEINTERLACE_CH0_HORZ_COEF0 + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH0_VERT_COEF + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH1_HORZ_COEF0 + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH1_VERT_COEF + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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}
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deinterlace_clr_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_COEF_ACCESS, 0);
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deinterlace_clr_set_bits(dev, DEINTERLACE_FIELD_CTRL,
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DEINTERLACE_FIELD_CTRL_FIELD_CNT_MSK,
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DEINTERLACE_FIELD_CTRL_FIELD_CNT(ctx->field));
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@@ -248,7 +269,6 @@ static irqreturn_t deinterlace_irq(int irq, void *data)
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static void deinterlace_init(struct deinterlace_dev *dev)
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{
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u32 val;
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int i;
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deinterlace_write(dev, DEINTERLACE_BYPASS,
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DEINTERLACE_BYPASS_CSC);
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@@ -285,26 +305,6 @@ static void deinterlace_init(struct deinterlace_dev *dev)
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deinterlace_clr_set_bits(dev, DEINTERLACE_CHROMA_DIFF,
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DEINTERLACE_CHROMA_DIFF_TH_MSK,
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DEINTERLACE_CHROMA_DIFF_TH(5));
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/* neutral filter coefficients */
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deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_COEF_ACCESS);
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readl_poll_timeout(dev->base + DEINTERLACE_STATUS, val,
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val & DEINTERLACE_STATUS_COEF_STATUS, 2, 40);
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for (i = 0; i < 32; i++) {
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deinterlace_write(dev, DEINTERLACE_CH0_HORZ_COEF0 + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH0_VERT_COEF + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH1_HORZ_COEF0 + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH1_VERT_COEF + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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}
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deinterlace_clr_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_COEF_ACCESS, 0);
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}
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static inline struct deinterlace_ctx *deinterlace_file2ctx(struct file *file)
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