Merge tag 'perf-urgent-2025-05-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 perf event fix from Ingo Molnar: "Fix PEBS-via-PT crash" * tag 'perf-urgent-2025-05-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/intel: Fix segfault with PEBS-via-PT with sample_freq
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@@ -2465,8 +2465,9 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs, struct perf_sample_
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setup_pebs_fixed_sample_data);
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}
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static void intel_pmu_pebs_event_update_no_drain(struct cpu_hw_events *cpuc, int size)
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static void intel_pmu_pebs_event_update_no_drain(struct cpu_hw_events *cpuc, u64 mask)
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{
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u64 pebs_enabled = cpuc->pebs_enabled & mask;
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struct perf_event *event;
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int bit;
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@@ -2477,7 +2478,7 @@ static void intel_pmu_pebs_event_update_no_drain(struct cpu_hw_events *cpuc, int
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* It needs to call intel_pmu_save_and_restart_reload() to
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* update the event->count for this case.
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*/
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for_each_set_bit(bit, (unsigned long *)&cpuc->pebs_enabled, size) {
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for_each_set_bit(bit, (unsigned long *)&pebs_enabled, X86_PMC_IDX_MAX) {
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event = cpuc->events[bit];
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if (event->hw.flags & PERF_X86_EVENT_AUTO_RELOAD)
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intel_pmu_save_and_restart_reload(event, 0);
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@@ -2512,7 +2513,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, struct perf_sample_d
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}
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if (unlikely(base >= top)) {
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intel_pmu_pebs_event_update_no_drain(cpuc, size);
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intel_pmu_pebs_event_update_no_drain(cpuc, mask);
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return;
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}
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@@ -2626,7 +2627,7 @@ static void intel_pmu_drain_pebs_icl(struct pt_regs *iregs, struct perf_sample_d
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(hybrid(cpuc->pmu, fixed_cntr_mask64) << INTEL_PMC_IDX_FIXED);
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if (unlikely(base >= top)) {
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intel_pmu_pebs_event_update_no_drain(cpuc, X86_PMC_IDX_MAX);
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intel_pmu_pebs_event_update_no_drain(cpuc, mask);
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return;
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}
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