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clk: rockchip: rk3328: set ddr clk with sip call

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We need use sip call to change ddr frequency.

Change-Id: I6ad4516306f0cb7c3e0a7124c21ee9fedfd9d055
Signed-off-by: Liang Chen <cl@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Liang Chen
2019-07-19 10:51:18 +08:00
committed by zhangqing
parent 1d8465b558
commit 4a3fcb9e1b
1 changed files with 7 additions and 6 deletions
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drivers/clk/rockchip/clk-rk3328.c
+7 -6
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@@ -317,14 +317,15 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
RK3328_CLKGATE_CON(14), 1, GFLAGS),
/* PD_DDR */
COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IS_CRITICAL,
RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
RK3328_CLKGATE_CON(0), 4, GFLAGS),
GATE(0, "clk_ddrmsch", "clk_ddr", CLK_IS_CRITICAL,
COMPOSITE_DDRCLK(SCLK_DDRCLK, "sclk_ddrc", mux_ddrphy_p, 0,
RK3328_CLKSEL_CON(3), 8, 2, 0, 3,
ROCKCHIP_DDRCLK_SIP_V2),
GATE(0, "clk_ddrmsch", "sclk_ddrc", CLK_IGNORE_UNUSED,
RK3328_CLKGATE_CON(18), 6, GFLAGS),
GATE(0, "clk_ddrupctl", "clk_ddr", CLK_IS_CRITICAL,
GATE(0, "clk_ddrupctl", "sclk_ddrc", CLK_IGNORE_UNUSED,
RK3328_CLKGATE_CON(18), 5, GFLAGS),
GATE(0, "aclk_ddrupctl", "clk_ddr", CLK_IGNORE_UNUSED,
GATE(0, "aclk_ddrupctl", "sclk_ddrc", CLK_IGNORE_UNUSED,
RK3328_CLKGATE_CON(18), 4, GFLAGS),
GATE(0, "clk_ddrmon", "xin24m", CLK_IGNORE_UNUSED,
RK3328_CLKGATE_CON(0), 6, GFLAGS),