iommu/arm-smmu-v3: Add missing S2FWB feature detection
Commit67e4fe3985("iommu/arm-smmu-v3: Use S2FWB for NESTED domains") introduced S2FWB usage but omitted the corresponding feature detection. As a result, vIOMMU allocation fails on FVP in arm_vsmmu_alloc(), due to the following check: if (!arm_smmu_master_canwbs(master) && !(smmu->features & ARM_SMMU_FEAT_S2FWB)) return ERR_PTR(-EOPNOTSUPP); This patch adds the missing detection logic to prevent allocation failure when S2FWB is supported. Fixes:67e4fe3985("iommu/arm-smmu-v3: Use S2FWB for NESTED domains") Signed-off-by: Aneesh Kumar K.V (Arm) <aneesh.kumar@kernel.org> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Pranjal Shrivastava <praan@google.com> Link: https://lore.kernel.org/r/20250408033351.1012411-1-aneesh.kumar@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
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Will Deacon
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45e00e3671
@@ -4429,6 +4429,8 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
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reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3);
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if (FIELD_GET(IDR3_RIL, reg))
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smmu->features |= ARM_SMMU_FEAT_RANGE_INV;
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if (FIELD_GET(IDR3_FWB, reg))
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smmu->features |= ARM_SMMU_FEAT_S2FWB;
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/* IDR5 */
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reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5);
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