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Merge branch 'net-stmmac-convert-meson8b-to-use-stmmac_get_phy_intf_sel'

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Russell King says:

====================
net: stmmac: convert meson8b to use stmmac_get_phy_intf_sel()

This series splits out meson8b from the previous 16 patch series
as that now has r-b tags.

This series converts meson8b to use stmmac_get_phy_intf_sel(). This
driver is not converted to the set_phy_intf_sel() method as it is
unclear whether there are ordering dependencies that would prevent
it. I would appreciate the driver author looking in to whether this
conversion is possible.
====================

Link: https://patch.msgid.link/aRH50uVDX4_9O5ZU@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
2025-11-11 17:53:30 -08:00
parent 34bff6f03c da3d150123
commit 458ea87a6b
1 changed files with 10 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
+10 -20
View File
@@ -26,8 +26,6 @@
#define PRG_ETH0_RGMII_MODE BIT(0)
#define PRG_ETH0_EXT_PHY_MODE_MASK GENMASK(2, 0)
#define PRG_ETH0_EXT_RGMII_MODE 1
#define PRG_ETH0_EXT_RMII_MODE 4
/* mux to choose between fclk_div2 (bit unset) and mpll2 (bit set) */
#define PRG_ETH0_CLK_M250_SEL_MASK GENMASK(4, 4)
@@ -238,28 +236,20 @@ static int meson8b_set_phy_mode(struct meson8b_dwmac *dwmac)
static int meson_axg_set_phy_mode(struct meson8b_dwmac *dwmac)
{
switch (dwmac->phy_mode) {
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* enable RGMII mode */
meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
PRG_ETH0_EXT_PHY_MODE_MASK,
PRG_ETH0_EXT_RGMII_MODE);
break;
case PHY_INTERFACE_MODE_RMII:
/* disable RGMII mode -> enables RMII mode */
meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
PRG_ETH0_EXT_PHY_MODE_MASK,
PRG_ETH0_EXT_RMII_MODE);
break;
default:
int phy_intf_sel;
phy_intf_sel = stmmac_get_phy_intf_sel(dwmac->phy_mode);
if (phy_intf_sel != PHY_INTF_SEL_RGMII &&
phy_intf_sel != PHY_INTF_SEL_RMII) {
dev_err(dwmac->dev, "fail to set phy-mode %s\n",
phy_modes(dwmac->phy_mode));
return -EINVAL;
return phy_intf_sel < 0 ? phy_intf_sel : -EINVAL;
}
meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_EXT_PHY_MODE_MASK,
FIELD_PREP(PRG_ETH0_EXT_PHY_MODE_MASK,
phy_intf_sel));
return 0;
}