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arm64: dts: qcom: qcs404: Add PCIe related nodes

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The QCS404 has a PCIe2 PHY and a Qualcomm PCIe controller, define these
to for the platform.

Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Bjorn Andersson
2019-05-08 15:43:08 -07:00
parent b84dfd175c
commit 431f64642c
1 changed files with 65 additions and 0 deletions
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arch/arm64/boot/dts/qcom/qcs404.dtsi
+65
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@@ -492,6 +492,21 @@
};
};
pcie_phy: phy@7786000 {
compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy";
reg = <0x07786000 0xb8>;
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>,
<&gcc 21>;
reset-names = "phy", "pipe";
clock-output-names = "pcie_0_pipe_clk";
#phy-cells = <0>;
status = "disabled";
};
sdcc1: sdcc@7804000 {
compatible = "qcom,sdhci-msm-v5";
reg = <0x07804000 0x1000>, <0x7805000 0x1000>;
@@ -909,6 +924,56 @@
label = "adsp";
};
};
pcie: pci@10000000 {
compatible = "qcom,pcie-qcs404", "snps,dw-pcie";
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
<0x07780000 0x2000>,
<0x10001000 0x2000>;
reg-names = "dbi", "elbi", "parf", "config";
device_type = "pci";
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0 0x10003000 0 0x00010000>, /* I/O */
<0x82000000 0 0x10013000 0x10013000 0 0x007ed000>; /* memory */
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
<0 0 0 2 &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
<0 0 0 3 &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
<&gcc GCC_PCIE_0_AUX_CLK>,
<&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_0_SLV_AXI_CLK>;
clock-names = "iface", "aux", "master_bus", "slave_bus";
resets = <&gcc 18>,
<&gcc 17>,
<&gcc 15>,
<&gcc 19>,
<&gcc GCC_PCIE_0_BCR>,
<&gcc 16>;
reset-names = "axi_m",
"axi_s",
"axi_m_sticky",
"pipe_sticky",
"pwr",
"ahb";
phys = <&pcie_phy>;
phy-names = "pciephy";
status = "disabled";
};
};
timer {