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arm64: dts: marvell: espressobin-ultra: fix Ethernet Switch unit address

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The Espressobin Ultra DTS includes Espressobin DTSI which defines
ethernet-switch@1 node.  The Ultra DTS overrides "reg" to 3, but that
leaves still old unit address which conflicts with the new phy@1 node
(W=1 dtc warning):

  armada-3720-espressobin.dtsi:148.29-203.4: Warning (unique_unit_address_if_enabled): /soc/internal-regs@d0000000/mdio@32004/ethernet-switch@1: duplicate unit-address (also used in node /soc/internal-regs@d0000000/mdio@32004/ethernet-phy@1)

Fix this by deleting ethernet-switch@1 node and merging original node
with code from Ultra DTS into new ethernet-switch@3.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Krzysztof Kozlowski
2024-04-02 20:32:40 +02:00
committed by Gregory CLEMENT
parent 34f5746a8c
commit 4289937de5
1 changed files with 67 additions and 37 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
+67 -37
View File
@@ -114,54 +114,84 @@
};
&mdio {
/* Switch is @3, not @1 */
/delete-node/ ethernet-switch@1;
extphy: ethernet-phy@1 {
reg = <1>;
reset-gpios = <&gpionb 2 GPIO_ACTIVE_LOW>;
};
};
&switch0 {
reg = <3>;
switch0: ethernet-switch@3 {
compatible = "marvell,mv88e6085";
reg = <3>;
reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;
dsa,member = <0 0>;
ethernet-ports {
switch0port1: ethernet-port@1 {
reg = <1>;
label = "lan0";
phy-handle = <&switch0phy0>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
switch0port0: ethernet-port@0 {
reg = <0>;
label = "cpu";
ethernet = <&eth0>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
switch0port1: ethernet-port@1 {
reg = <1>;
label = "lan0";
phy-handle = <&switch0phy0>;
};
switch0port2: ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy1>;
};
switch0port3: ethernet-port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&switch0phy2>;
};
switch0port4: ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy3>;
};
switch0port5: ethernet-port@5 {
reg = <5>;
label = "wan";
phy-handle = <&extphy>;
phy-mode = "sgmii";
};
};
switch0port2: ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy1>;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch0port3: ethernet-port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&switch0phy2>;
};
switch0port4: ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy3>;
};
switch0port5: ethernet-port@5 {
reg = <5>;
label = "wan";
phy-handle = <&extphy>;
phy-mode = "sgmii";
};
};
mdio {
switch0phy3: ethernet-phy@14 {
reg = <0x14>;
switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};
switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};
switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};
switch0phy3: ethernet-phy@14 {
reg = <0x14>;
};
};
};
};