drm/amd/display: update DML2 policy EnhancedPrefetchScheduleAccelerationFinal DCN35
commit0d5e5e8a0aupstream. [WHY & HOW] Mismatch in DCN35 DML2 cause bw validation failed to acquire unexpected DPP pipe to cause grey screen and system hang. Remove EnhancedPrefetchScheduleAccelerationFinal value override to match HW spec. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Yihan Zhu <Yihan.Zhu@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit9dad21f910) Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
5e801c0005
commit
4010efc851
@@ -303,7 +303,6 @@ void build_unoptimized_policy_settings(enum dml_project_id project, struct dml_m
|
||||
if (project == dml_project_dcn35 ||
|
||||
project == dml_project_dcn351) {
|
||||
policy->DCCProgrammingAssumesScanDirectionUnknownFinal = false;
|
||||
policy->EnhancedPrefetchScheduleAccelerationFinal = 0;
|
||||
policy->AllowForPStateChangeOrStutterInVBlankFinal = dml_prefetch_support_uclk_fclk_and_stutter_if_possible; /*new*/
|
||||
policy->UseOnlyMaxPrefetchModes = 1;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user