drm/amd/display: add plane CTM support
Map the plane CTM driver-specific property to DC plane, instead of DC stream. The remaining steps to program DPP block are already implemented on DC shared-code. v3: - fix comment about plane and CRTC CTMs priorities (Harry) Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher
parent
34dc227bf2
commit
3dad690907
@@ -9983,6 +9983,7 @@ static bool should_reset_plane(struct drm_atomic_state *state,
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if (dm_old_other_state->degamma_tf != dm_new_other_state->degamma_tf ||
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dm_old_other_state->degamma_lut != dm_new_other_state->degamma_lut ||
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dm_old_other_state->hdr_mult != dm_new_other_state->hdr_mult ||
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dm_old_other_state->ctm != dm_new_other_state->ctm ||
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dm_old_other_state->shaper_lut != dm_new_other_state->shaper_lut ||
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dm_old_other_state->shaper_tf != dm_new_other_state->shaper_tf ||
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dm_old_other_state->lut3d != dm_new_other_state->lut3d ||
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@@ -1172,6 +1172,8 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
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struct dc_plane_state *dc_plane_state)
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{
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struct amdgpu_device *adev = drm_to_adev(crtc->base.state->dev);
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struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
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struct drm_color_ctm *ctm = NULL;
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struct dc_color_caps *color_caps = NULL;
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bool has_crtc_cm_degamma;
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int ret;
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@@ -1224,5 +1226,29 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
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return ret;
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}
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/* Setup CRTC CTM. */
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if (dm_plane_state->ctm) {
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ctm = (struct drm_color_ctm *)dm_plane_state->ctm->data;
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/*
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* DCN2 and older don't support both pre-blending and
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* post-blending gamut remap. For this HW family, if we have
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* the plane and CRTC CTMs simultaneously, CRTC CTM takes
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* priority, and we discard plane CTM, as implemented in
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* dcn10_program_gamut_remap(). However, DCN3+ has DPP
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* (pre-blending) and MPC (post-blending) `gamut remap` blocks;
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* therefore, we can program plane and CRTC CTMs together by
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* mapping CRTC CTM to MPC and keeping plane CTM setup at DPP,
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* as it's done by dcn30_program_gamut_remap().
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*/
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__drm_ctm_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
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dc_plane_state->gamut_remap_matrix.enable_remap = true;
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dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
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} else {
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/* Bypass CTM. */
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dc_plane_state->gamut_remap_matrix.enable_remap = false;
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dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
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}
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return amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state);
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}
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