drm/amdgpu/mes12: switch SET_SHADER_DEBUGGER pkt to mes schq pipe
The SET_SHADER_DEBUGGER packet must work with the added hardware queue, switch the packet submitting to mes schq pipe. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.11.x
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@@ -479,6 +479,11 @@ static int mes_v12_0_misc_op(struct amdgpu_mes *mes,
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union MESAPI__MISC misc_pkt;
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int pipe;
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if (mes->adev->enable_uni_mes)
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pipe = AMDGPU_MES_KIQ_PIPE;
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else
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pipe = AMDGPU_MES_SCHED_PIPE;
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memset(&misc_pkt, 0, sizeof(misc_pkt));
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misc_pkt.header.type = MES_API_TYPE_SCHEDULER;
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@@ -513,6 +518,7 @@ static int mes_v12_0_misc_op(struct amdgpu_mes *mes,
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misc_pkt.wait_reg_mem.reg_offset2 = input->wrm_reg.reg1;
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break;
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case MES_MISC_OP_SET_SHADER_DEBUGGER:
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pipe = AMDGPU_MES_SCHED_PIPE;
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misc_pkt.opcode = MESAPI_MISC__SET_SHADER_DEBUGGER;
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misc_pkt.set_shader_debugger.process_context_addr =
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input->set_shader_debugger.process_context_addr;
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@@ -530,11 +536,6 @@ static int mes_v12_0_misc_op(struct amdgpu_mes *mes,
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return -EINVAL;
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}
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if (mes->adev->enable_uni_mes)
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pipe = AMDGPU_MES_KIQ_PIPE;
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else
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pipe = AMDGPU_MES_SCHED_PIPE;
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return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
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&misc_pkt, sizeof(misc_pkt),
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offsetof(union MESAPI__MISC, api_status));
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