ARM: dts: rockchip: add rv1103g-evb2-v10.dts
Change-Id: Ib1129a170917fc2a575a984f615217b09e61814a Signed-off-by: Weiwen Chen <cww@rock-chips.com>
This commit is contained in:
Weiwen Chen
@@ -979,6 +979,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1103g-evb-v10.dtb \
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rv1103g-evb-v11.dtb \
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rv1103g-evb-v11-sii902x-bt6562hdmi.dtb \
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rv1103g-evb2-v10.dtb \
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rv1103g-rmsl311-dloc-sl-v10.dtb \
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rv1103g-scaner-v10.dtb \
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rv1106g-38x38-ipc-v10.dtb \
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@@ -0,0 +1,304 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1103.dtsi"
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#include "rv1103-evb-v10.dtsi"
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#include "rv1106-thunder-boot-spi-nor.dtsi"
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/ {
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model = "Rockchip RV1103G EVB2 IPC V10 Board";
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compatible = "rockchip,rv1103g-evb2-v10", "rockchip,rv1103";
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chosen {
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bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip storagemedia=mtd androidboot.storagemedia=mtd androidboot.mode=normal";
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vcc3v3_sd: vcc3v3-sd {
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compatible = "regulator-fixed";
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gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
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regulator-name = "vcc3v3_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-low;
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regulator-always-on;
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regulator-boot-on;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwren>;
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};
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vcc3v3_wifi: vcc3v3-wifi {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_wifi";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-low;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 RK_PC7 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_pwren>;
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};
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vdd_arm: vdd-arm {
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compatible = "pwm-regulator";
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pwms = <&pwm0 0 5000 1>;
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-init-microvolt = <900000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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};
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};
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&acodec {
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#sound-dai-cells = <0>;
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pa-ctl-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&sc3338_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&fiq_debugger {
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rockchip,baudrate = <1500000>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m1_xfer>;
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};
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&i2c4 {
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rockchip,amp-shared;
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m2_xfer>;
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status = "okay";
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sc3338: sc3338@30 {
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compatible = "smartsens,sc3338";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "FKO1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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sc3338_out: endpoint {
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remote-endpoint = <&csi_dphy_input0>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mailbox {
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status = "okay";
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};
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&memory {
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reg = <0x00000000 0x04000000>;
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi_dphy_output>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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};
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};
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};
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};
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&pinctrl {
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sdmmc {
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/omit-if-no-ref/
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sdmmc_pwren: sdmmc-pwren {
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rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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wifi {
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wifi_pwren: wifi-pwren {
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rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&pwm10 {
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status = "okay";
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};
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&pwm11 {
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status = "okay";
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pinctrl-0 = <&pwm11m1_pins>;
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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memory-region-thunderboot = <&rkisp_thunderboot>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds_sditf: endpoint {
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remote-endpoint = <&isp_in>;
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};
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};
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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memory-region-thunderboot = <&rkisp_thunderboot>;
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port@0 {
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isp_in: endpoint {
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remote-endpoint = <&mipi_lvds_sditf>;
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};
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};
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};
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&rkisp_thunderboot {
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/* reg's offset MUST match with RTOS */
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/*
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* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
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* e.g. 2304x1296: 0xf30000
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*/
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reg = <0x00860000 0xf30000>;
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};
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&ramdisk_r {
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reg = <0x1790000 (10 * 0x00100000)>;
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};
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&ramdisk_c {
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reg = <0x2190000 (5 * 0x00100000)>;
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};
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&saradc {
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status = "okay";
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vref-supply = <&vcc_1v8>;
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};
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&sfc {
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assigned-clocks = <&cru SCLK_SFC>;
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assigned-clock-rates = <125000000>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <125000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&thunder_boot_service {
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status = "okay";
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};
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&usbdrd_dwc3 {
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dr_mode = "host";
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};
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