arm64: dts: qcom: sm8550-hdk: correct WCD9385 route and port mapping
Starting from SM8550, the TX ADC input soundwire port is offset by 1,
and uses the new SWR_INPUTx input ports, so replace the legacy
SWR_ADCx routes for SWR_INPUT0 & SWR_INPUT1 following the correct
TX Soundwire port mapping.
Add some comments on the routing for clarity.
Fixes: b5e25ded27 ("arm64: dts: qcom: sm8550: add support for the SM8550-HDK board")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240201-topic-sm8550-hdk8550-audio-fix-v1-1-aa526c9c91d5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
committed by
Bjorn Andersson
parent
0f9b8054bb
commit
31ca6241fe
@@ -211,9 +211,9 @@
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"AMIC1", "MIC BIAS1",
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"AMIC2", "MIC BIAS2",
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"AMIC5", "MIC BIAS4",
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"TX SWR_ADC0", "ADC1_OUTPUT",
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"TX SWR_ADC1", "ADC2_OUTPUT",
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"TX SWR_ADC3", "ADC4_OUTPUT";
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"TX SWR_INPUT0", "ADC1_OUTPUT",
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"TX SWR_INPUT1", "ADC2_OUTPUT",
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"TX SWR_INPUT1", "ADC4_OUTPUT";
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wcd-playback-dai-link {
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link-name = "WCD Playback";
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@@ -1139,6 +1139,13 @@
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compatible = "sdw20217010d00";
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reg = <0 4>;
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/*
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* WCD9385 RX Port 1 (HPH_L/R) <=> SWR1 Port 1 (HPH_L/R)
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* WCD9385 RX Port 2 (CLSH) <=> SWR1 Port 2 (CLSH)
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* WCD9385 RX Port 3 (COMP_L/R) <=> SWR1 Port 3 (COMP_L/R)
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* WCD9385 RX Port 4 (LO) <=> SWR1 Port 4 (LO)
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* WCD9385 RX Port 5 (DSD_L/R) <=> SWR1 Port 5 (DSD_L/R)
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*/
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qcom,rx-port-mapping = <1 2 3 4 5>;
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};
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};
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@@ -1151,7 +1158,13 @@
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compatible = "sdw20217010d00";
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reg = <0 3>;
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qcom,tx-port-mapping = <1 1 2 3>;
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/*
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* WCD9385 TX Port 1 (ADC1,2) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
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* WCD9385 TX Port 2 (ADC3,4) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
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* WCD9385 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7)
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* WCD9385 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11)
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*/
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qcom,tx-port-mapping = <2 2 3 4>;
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};
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};
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