Merge tag 'wireless-2025-04-24' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless
Johannes Berg says: ==================== Some more fixes, notably: * iwlwifi: various regression and iwlmld fixes * mac80211: fix TX frames in monitor mode * brcmfmac: error handling for firmware load * tag 'wireless-2025-04-24' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless: wifi: iwlwifi: restore missing initialization of async_handlers_list wifi: brcm80211: fmac: Add error handling for brcmf_usb_dl_writeimage() wifi: plfxlc: Remove erroneous assert in plfxlc_mac_release wifi: iwlwifi: fix the check for the SCRATCH register upon resume wifi: iwlwifi: don't warn if the NIC is gone in resume wifi: iwlwifi: mld: fix BAID validity check wifi: iwlwifi: back off on continuous errors wifi: iwlwifi: mld: only create debugfs symlink if it does not exist wifi: iwlwifi: mld: inform trans on init failure wifi: iwlwifi: mld: properly handle async notification in op mode start Revert "wifi: iwlwifi: make no_160 more generic" Revert "wifi: iwlwifi: add support for BE213" wifi: mac80211: restore monitor for outgoing frames ==================== Link: https://patch.msgid.link/20250424120535.56499-3-johannes@sipsolutions.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
@@ -896,14 +896,16 @@ brcmf_usb_dl_writeimage(struct brcmf_usbdev_info *devinfo, u8 *fw, int fwlen)
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}
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/* 1) Prepare USB boot loader for runtime image */
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brcmf_usb_dl_cmd(devinfo, DL_START, &state, sizeof(state));
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err = brcmf_usb_dl_cmd(devinfo, DL_START, &state, sizeof(state));
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if (err)
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goto fail;
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rdlstate = le32_to_cpu(state.state);
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rdlbytes = le32_to_cpu(state.bytes);
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/* 2) Check we are in the Waiting state */
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if (rdlstate != DL_WAITING) {
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brcmf_err("Failed to DL_START\n");
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brcmf_err("Invalid DL state: %u\n", rdlstate);
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err = -EINVAL;
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goto fail;
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}
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@@ -142,8 +142,6 @@ const struct iwl_cfg_trans_params iwl_sc_trans_cfg = {
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.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
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};
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const char iwl_sp_name[] = "Intel(R) Wi-Fi 7 BE213 160MHz";
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const struct iwl_cfg iwl_cfg_sc = {
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.fw_name_mac = "sc",
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IWL_DEVICE_SC,
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@@ -2,7 +2,7 @@
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/*
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* Copyright (C) 2005-2014, 2018-2021 Intel Corporation
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* Copyright (C) 2016-2017 Intel Deutschland GmbH
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* Copyright (C) 2018-2025 Intel Corporation
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* Copyright (C) 2018-2024 Intel Corporation
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*/
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#ifndef __IWL_CONFIG_H__
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#define __IWL_CONFIG_H__
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@@ -451,8 +451,11 @@ struct iwl_cfg {
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#define IWL_CFG_RF_ID_HR 0x7
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#define IWL_CFG_RF_ID_HR1 0x4
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#define IWL_CFG_BW_NO_LIM (U16_MAX - 1)
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#define IWL_CFG_BW_ANY U16_MAX
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#define IWL_CFG_NO_160 0x1
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#define IWL_CFG_160 0x0
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#define IWL_CFG_NO_320 0x1
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#define IWL_CFG_320 0x0
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#define IWL_CFG_CORES_BT 0x0
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#define IWL_CFG_CORES_BT_GNSS 0x5
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@@ -464,7 +467,7 @@ struct iwl_cfg {
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#define IWL_CFG_IS_JACKET 0x1
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#define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4)
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#define IWL_SUBDEVICE_BW_LIM(subdevice) ((u16)((subdevice) & 0x0200) >> 9)
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#define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0200) >> 9)
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#define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10)
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struct iwl_dev_info {
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@@ -472,10 +475,10 @@ struct iwl_dev_info {
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u16 subdevice;
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u16 mac_type;
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u16 rf_type;
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u16 bw_limit;
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u8 mac_step;
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u8 rf_step;
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u8 rf_id;
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u8 no_160;
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u8 cores;
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u8 cdb;
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u8 jacket;
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@@ -489,7 +492,7 @@ extern const unsigned int iwl_dev_info_table_size;
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const struct iwl_dev_info *
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iwl_pci_find_dev_info(u16 device, u16 subsystem_device,
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u16 mac_type, u8 mac_step, u16 rf_type, u8 cdb,
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u8 jacket, u8 rf_id, u8 bw_limit, u8 cores, u8 rf_step);
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u8 jacket, u8 rf_id, u8 no_160, u8 cores, u8 rf_step);
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extern const struct pci_device_id iwl_hw_card_ids[];
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#endif
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@@ -550,7 +553,6 @@ extern const char iwl_ax231_name[];
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extern const char iwl_ax411_name[];
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extern const char iwl_fm_name[];
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extern const char iwl_wh_name[];
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extern const char iwl_sp_name[];
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extern const char iwl_gl_name[];
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extern const char iwl_mtp_name[];
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extern const char iwl_dr_name[];
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@@ -148,6 +148,7 @@
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* during a error FW error.
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*/
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#define CSR_FUNC_SCRATCH_INIT_VALUE (0x01010101)
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#define CSR_FUNC_SCRATCH_POWER_OFF_MASK 0xFFFF
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/* Bits for CSR_HW_IF_CONFIG_REG */
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#define CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP_DASH (0x0000000F)
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/*
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* Copyright (C) 2005-2014, 2018-2023, 2025 Intel Corporation
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* Copyright (C) 2005-2014, 2018-2023 Intel Corporation
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* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
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* Copyright (C) 2016-2017 Intel Deutschland GmbH
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*/
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@@ -944,8 +944,7 @@ iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans,
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IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK);
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break;
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case NL80211_BAND_6GHZ:
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if (!trans->reduced_cap_sku &&
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trans->bw_limit >= 320) {
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if (!trans->reduced_cap_sku) {
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iftype_data->eht_cap.eht_cap_elem.phy_cap_info[0] |=
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IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
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iftype_data->eht_cap.eht_cap_elem.phy_cap_info[1] |=
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@@ -1095,22 +1094,19 @@ iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans,
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iftype_data->eht_cap.eht_mcs_nss_supp.bw._320.rx_tx_mcs13_max_nss = 0;
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}
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if (trans->bw_limit < 160)
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if (trans->no_160)
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iftype_data->he_cap.he_cap_elem.phy_cap_info[0] &=
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~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
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if (trans->bw_limit < 320 || trans->reduced_cap_sku) {
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if (trans->reduced_cap_sku) {
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memset(&iftype_data->eht_cap.eht_mcs_nss_supp.bw._320, 0,
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sizeof(iftype_data->eht_cap.eht_mcs_nss_supp.bw._320));
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iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] &=
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~IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK;
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}
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if (trans->reduced_cap_sku) {
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iftype_data->eht_cap.eht_mcs_nss_supp.bw._80.rx_tx_mcs13_max_nss = 0;
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iftype_data->eht_cap.eht_mcs_nss_supp.bw._160.rx_tx_mcs13_max_nss = 0;
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iftype_data->eht_cap.eht_cap_elem.phy_cap_info[8] &=
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~IEEE80211_EHT_PHY_CAP8_RX_4096QAM_WIDER_BW_DL_OFDMA;
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iftype_data->eht_cap.eht_cap_elem.phy_cap_info[2] &=
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~IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK;
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}
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}
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@@ -21,6 +21,7 @@ struct iwl_trans_dev_restart_data {
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struct list_head list;
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unsigned int restart_count;
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time64_t last_error;
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bool backoff;
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char name[];
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};
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@@ -125,13 +126,20 @@ iwl_trans_determine_restart_mode(struct iwl_trans *trans)
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if (!data)
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return at_least;
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if (ktime_get_boottime_seconds() - data->last_error >=
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if (!data->backoff &&
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ktime_get_boottime_seconds() - data->last_error >=
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IWL_TRANS_RESET_OK_TIME)
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data->restart_count = 0;
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index = data->restart_count;
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if (index >= ARRAY_SIZE(escalation_list))
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if (index >= ARRAY_SIZE(escalation_list)) {
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index = ARRAY_SIZE(escalation_list) - 1;
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if (!data->backoff) {
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data->backoff = true;
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return IWL_RESET_MODE_BACKOFF;
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}
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data->backoff = false;
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}
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return max(at_least, escalation_list[index]);
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}
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@@ -140,7 +148,8 @@ iwl_trans_determine_restart_mode(struct iwl_trans *trans)
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static void iwl_trans_restart_wk(struct work_struct *wk)
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{
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struct iwl_trans *trans = container_of(wk, typeof(*trans), restart.wk);
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struct iwl_trans *trans = container_of(wk, typeof(*trans),
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restart.wk.work);
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struct iwl_trans_reprobe *reprobe;
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enum iwl_reset_mode mode;
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@@ -168,6 +177,12 @@ static void iwl_trans_restart_wk(struct work_struct *wk)
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return;
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mode = iwl_trans_determine_restart_mode(trans);
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if (mode == IWL_RESET_MODE_BACKOFF) {
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IWL_ERR(trans, "Too many device errors - delay next reset\n");
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queue_delayed_work(system_unbound_wq, &trans->restart.wk,
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IWL_TRANS_RESET_DELAY);
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return;
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}
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iwl_trans_inc_restart_count(trans->dev);
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@@ -227,7 +242,7 @@ struct iwl_trans *iwl_trans_alloc(unsigned int priv_size,
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trans->dev = dev;
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trans->num_rx_queues = 1;
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INIT_WORK(&trans->restart.wk, iwl_trans_restart_wk);
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INIT_DELAYED_WORK(&trans->restart.wk, iwl_trans_restart_wk);
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return trans;
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}
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@@ -271,7 +286,7 @@ int iwl_trans_init(struct iwl_trans *trans)
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void iwl_trans_free(struct iwl_trans *trans)
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{
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cancel_work_sync(&trans->restart.wk);
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cancel_delayed_work_sync(&trans->restart.wk);
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kmem_cache_destroy(trans->dev_cmd_pool);
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}
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@@ -403,7 +418,7 @@ void iwl_trans_op_mode_leave(struct iwl_trans *trans)
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iwl_trans_pcie_op_mode_leave(trans);
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cancel_work_sync(&trans->restart.wk);
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cancel_delayed_work_sync(&trans->restart.wk);
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trans->op_mode = NULL;
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@@ -540,7 +555,6 @@ void __releases(nic_access)
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iwl_trans_release_nic_access(struct iwl_trans *trans)
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{
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iwl_trans_pcie_release_nic_access(trans);
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__release(nic_access);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_release_nic_access);
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (C) 2005-2014, 2018-2023, 2025 Intel Corporation
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* Copyright (C) 2005-2014, 2018-2023 Intel Corporation
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* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
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* Copyright (C) 2016-2017 Intel Deutschland GmbH
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*/
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@@ -876,7 +876,7 @@ struct iwl_txq {
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* only valid for discrete (not integrated) NICs
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* @invalid_tx_cmd: invalid TX command buffer
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* @reduced_cap_sku: reduced capability supported SKU
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* @bw_limit: the max bandwidth
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* @no_160: device not supporting 160 MHz
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* @step_urm: STEP is in URM, no support for MCS>9 in 320 MHz
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* @restart: restart worker data
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* @restart.wk: restart worker
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@@ -911,8 +911,7 @@ struct iwl_trans {
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char hw_id_str[52];
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u32 sku_id[3];
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bool reduced_cap_sku;
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u16 bw_limit;
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bool step_urm;
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u8 no_160:1, step_urm:1;
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u8 dsbr_urm_fw_dependent:1,
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dsbr_urm_permanent:1;
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@@ -962,7 +961,7 @@ struct iwl_trans {
|
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struct iwl_dma_ptr invalid_tx_cmd;
|
||||
|
||||
struct {
|
||||
struct work_struct wk;
|
||||
struct delayed_work wk;
|
||||
struct iwl_fw_error_dump_mode mode;
|
||||
bool during_reset;
|
||||
} restart;
|
||||
@@ -1163,7 +1162,7 @@ static inline void iwl_trans_schedule_reset(struct iwl_trans *trans,
|
||||
*/
|
||||
trans->restart.during_reset = test_bit(STATUS_IN_SW_RESET,
|
||||
&trans->status);
|
||||
queue_work(system_unbound_wq, &trans->restart.wk);
|
||||
queue_delayed_work(system_unbound_wq, &trans->restart.wk, 0);
|
||||
}
|
||||
|
||||
static inline void iwl_trans_fw_error(struct iwl_trans *trans,
|
||||
@@ -1262,6 +1261,9 @@ enum iwl_reset_mode {
|
||||
IWL_RESET_MODE_RESCAN,
|
||||
IWL_RESET_MODE_FUNC_RESET,
|
||||
IWL_RESET_MODE_PROD_RESET,
|
||||
|
||||
/* keep last - special backoff value */
|
||||
IWL_RESET_MODE_BACKOFF,
|
||||
};
|
||||
|
||||
void iwl_trans_pcie_reset(struct iwl_trans *trans, enum iwl_reset_mode mode);
|
||||
|
||||
@@ -124,9 +124,9 @@ void iwl_mld_handle_bar_frame_release_notif(struct iwl_mld *mld,
|
||||
|
||||
rcu_read_lock();
|
||||
baid_data = rcu_dereference(mld->fw_id_to_ba[baid]);
|
||||
if (!IWL_FW_CHECK(mld, !baid_data,
|
||||
"Got valid BAID %d but not allocated, invalid BAR release!\n",
|
||||
baid))
|
||||
if (IWL_FW_CHECK(mld, !baid_data,
|
||||
"Got valid BAID %d but not allocated, invalid BAR release!\n",
|
||||
baid))
|
||||
goto out_unlock;
|
||||
|
||||
if (IWL_FW_CHECK(mld, tid != baid_data->tid ||
|
||||
|
||||
@@ -949,8 +949,9 @@ void iwl_mld_add_vif_debugfs(struct ieee80211_hw *hw,
|
||||
snprintf(name, sizeof(name), "%pd", vif->debugfs_dir);
|
||||
snprintf(target, sizeof(target), "../../../%pd3/iwlmld",
|
||||
vif->debugfs_dir);
|
||||
mld_vif->dbgfs_slink =
|
||||
debugfs_create_symlink(name, mld->debugfs_dir, target);
|
||||
if (!mld_vif->dbgfs_slink)
|
||||
mld_vif->dbgfs_slink =
|
||||
debugfs_create_symlink(name, mld->debugfs_dir, target);
|
||||
|
||||
if (iwlmld_mod_params.power_scheme != IWL_POWER_SCHEME_CAM &&
|
||||
vif->type == NL80211_IFTYPE_STATION) {
|
||||
|
||||
@@ -333,19 +333,22 @@ int iwl_mld_load_fw(struct iwl_mld *mld)
|
||||
|
||||
ret = iwl_trans_start_hw(mld->trans);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto err;
|
||||
|
||||
ret = iwl_mld_run_fw_init_sequence(mld);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto err;
|
||||
|
||||
ret = iwl_mld_init_mcc(mld);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto err;
|
||||
|
||||
mld->fw_status.running = true;
|
||||
|
||||
return 0;
|
||||
err:
|
||||
iwl_mld_stop_fw(mld);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void iwl_mld_stop_fw(struct iwl_mld *mld)
|
||||
@@ -358,6 +361,10 @@ void iwl_mld_stop_fw(struct iwl_mld *mld)
|
||||
|
||||
iwl_trans_stop_device(mld->trans);
|
||||
|
||||
wiphy_work_cancel(mld->wiphy, &mld->async_handlers_wk);
|
||||
|
||||
iwl_mld_purge_async_handlers_list(mld);
|
||||
|
||||
mld->fw_status.running = false;
|
||||
}
|
||||
|
||||
|
||||
@@ -651,6 +651,7 @@ void iwl_mld_mac80211_remove_interface(struct ieee80211_hw *hw,
|
||||
|
||||
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
||||
debugfs_remove(iwl_mld_vif_from_mac80211(vif)->dbgfs_slink);
|
||||
iwl_mld_vif_from_mac80211(vif)->dbgfs_slink = NULL;
|
||||
#endif
|
||||
|
||||
iwl_mld_rm_vif(mld, vif);
|
||||
|
||||
@@ -75,6 +75,7 @@ void iwl_construct_mld(struct iwl_mld *mld, struct iwl_trans *trans,
|
||||
|
||||
/* Setup async RX handling */
|
||||
spin_lock_init(&mld->async_handlers_lock);
|
||||
INIT_LIST_HEAD(&mld->async_handlers_list);
|
||||
wiphy_work_init(&mld->async_handlers_wk,
|
||||
iwl_mld_async_handlers_wk);
|
||||
|
||||
@@ -414,9 +415,14 @@ iwl_op_mode_mld_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
wiphy_unlock(mld->wiphy);
|
||||
rtnl_unlock();
|
||||
iwl_fw_flush_dumps(&mld->fwrt);
|
||||
goto free_hw;
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* We are about to stop the FW. Notifications may require an
|
||||
* operational FW, so handle them all here before we stop.
|
||||
*/
|
||||
wiphy_work_flush(mld->wiphy, &mld->async_handlers_wk);
|
||||
|
||||
iwl_mld_stop_fw(mld);
|
||||
|
||||
wiphy_unlock(mld->wiphy);
|
||||
@@ -455,7 +461,8 @@ leds_exit:
|
||||
iwl_mld_leds_exit(mld);
|
||||
free_nvm:
|
||||
kfree(mld->nvm_data);
|
||||
free_hw:
|
||||
err:
|
||||
iwl_trans_op_mode_leave(mld->trans);
|
||||
ieee80211_free_hw(mld->hw);
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
|
||||
@@ -298,11 +298,6 @@ iwl_cleanup_mld(struct iwl_mld *mld)
|
||||
#endif
|
||||
|
||||
iwl_mld_low_latency_restart_cleanup(mld);
|
||||
|
||||
/* Empty the list of async notification handlers so we won't process
|
||||
* notifications from the dead fw after the reconfig flow.
|
||||
*/
|
||||
iwl_mld_purge_async_handlers_list(mld);
|
||||
}
|
||||
|
||||
enum iwl_power_scheme {
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
|
||||
/*
|
||||
* Copyright (C) 2005-2014, 2018-2025 Intel Corporation
|
||||
* Copyright (C) 2005-2014, 2018-2024 Intel Corporation
|
||||
* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
|
||||
* Copyright (C) 2016-2017 Intel Deutschland GmbH
|
||||
*/
|
||||
@@ -552,17 +552,16 @@ MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
|
||||
EXPORT_SYMBOL_IF_IWLWIFI_KUNIT(iwl_hw_card_ids);
|
||||
|
||||
#define _IWL_DEV_INFO(_device, _subdevice, _mac_type, _mac_step, _rf_type, \
|
||||
_rf_id, _rf_step, _bw_limit, _cores, _cdb, _cfg, _name) \
|
||||
_rf_id, _rf_step, _no_160, _cores, _cdb, _cfg, _name) \
|
||||
{ .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \
|
||||
.name = _name, .mac_type = _mac_type, .rf_type = _rf_type, .rf_step = _rf_step, \
|
||||
.bw_limit = _bw_limit, .cores = _cores, .rf_id = _rf_id, \
|
||||
.no_160 = _no_160, .cores = _cores, .rf_id = _rf_id, \
|
||||
.mac_step = _mac_step, .cdb = _cdb, .jacket = IWL_CFG_ANY }
|
||||
|
||||
#define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \
|
||||
_IWL_DEV_INFO(_device, _subdevice, IWL_CFG_ANY, IWL_CFG_ANY, \
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, \
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_ANY, \
|
||||
_cfg, _name)
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, \
|
||||
IWL_CFG_ANY, _cfg, _name)
|
||||
|
||||
VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
#if IS_ENABLED(CONFIG_IWLMVM)
|
||||
@@ -725,66 +724,66 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_2ac_cfg_soc, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_2ac_cfg_soc, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_2ac_cfg_soc, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_2ac_cfg_soc, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_2ac_cfg_soc, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_2ac_cfg_soc, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB,
|
||||
iwl9260_2ac_cfg, iwl9270_160_name),
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB,
|
||||
iwl9260_2ac_cfg, iwl9270_name),
|
||||
|
||||
_IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9260_2ac_cfg, iwl9162_160_name),
|
||||
_IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9260_2ac_cfg, iwl9162_name),
|
||||
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9260_2ac_cfg, iwl9260_160_name),
|
||||
_IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9260_2ac_cfg, iwl9260_name),
|
||||
|
||||
/* Qu with Jf */
|
||||
@@ -792,132 +791,132 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_b0_jf_b0_cfg, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_b0_jf_b0_cfg, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_b0_jf_b0_cfg, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_b0_jf_b0_cfg, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_b0_jf_b0_cfg, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_b0_jf_b0_cfg, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550s_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550i_name),
|
||||
|
||||
/* Qu C step */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_c0_jf_b0_cfg, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_c0_jf_b0_cfg, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_c0_jf_b0_cfg, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_c0_jf_b0_cfg, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_c0_jf_b0_cfg, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_c0_jf_b0_cfg, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550s_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550i_name),
|
||||
|
||||
/* QuZ */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9462_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9560_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550s_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550i_name),
|
||||
|
||||
/* Qu with Hr */
|
||||
@@ -925,189 +924,189 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_qu_b0_hr1_b0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_qu_b0_hr_b0, iwl_ax203_name),
|
||||
|
||||
/* Qu C step */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_qu_c0_hr1_b0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_qu_c0_hr_b0, iwl_ax203_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_qu_c0_hr_b0, iwl_ax201_name),
|
||||
|
||||
/* QuZ */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_quz_a0_hr1_b0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_quz_a0_hr_b0, iwl_ax203_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_QUZ, SILICON_B_STEP,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_quz_a0_hr_b0, iwl_ax201_name),
|
||||
|
||||
/* Ma */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_ma, iwl_ax201_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_ma, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_ma, iwl_ax231_name),
|
||||
|
||||
/* So with Hr */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax203_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax201_name),
|
||||
|
||||
/* So-F with Hr */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax203_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
80, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax101_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_so_a0_hr_a0, iwl_ax201_name),
|
||||
|
||||
/* So-F with Gf */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_CDB,
|
||||
iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_name),
|
||||
|
||||
/* SoF with JF2 */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_name),
|
||||
|
||||
/* SoF with JF */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_name),
|
||||
|
||||
/* So with GF */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_CDB,
|
||||
IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_CDB,
|
||||
iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_name),
|
||||
|
||||
/* So with JF2 */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9560_name),
|
||||
|
||||
/* So with JF */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9461_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY,
|
||||
80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB,
|
||||
iwlax210_2ax_cfg_so_jf_b0, iwl9462_name),
|
||||
|
||||
#endif /* CONFIG_IWLMVM */
|
||||
@@ -1116,13 +1115,13 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_bz, iwl_ax201_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_bz, iwl_ax211_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
@@ -1134,119 +1133,104 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_bz, iwl_wh_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ_W, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_bz, iwl_ax201_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ_W, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_bz, iwl_ax211_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ_W, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_bz, iwl_fm_name),
|
||||
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BZ_W, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_bz, iwl_wh_name),
|
||||
|
||||
/* Ga (Gl) */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_GL, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_320, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_gl, iwl_gl_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_GL, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
160, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
IWL_CFG_NO_320, IWL_CFG_ANY, IWL_CFG_NO_CDB,
|
||||
iwl_cfg_gl, iwl_mtp_name),
|
||||
|
||||
/* Sc */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc, iwl_fm_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc, iwl_wh_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
160, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc, iwl_sp_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC2, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc2, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC2, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc2, iwl_fm_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC2, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc2, iwl_wh_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC2, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
160, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc2, iwl_sp_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC2F, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc2f, iwl_ax211_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC2F, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc2f, iwl_fm_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC2F, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc2f, iwl_wh_name),
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_SC2F, IWL_CFG_ANY,
|
||||
IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
160, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_sc2f, iwl_sp_name),
|
||||
|
||||
/* Dr */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_DR, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_dr, iwl_dr_name),
|
||||
|
||||
/* Br */
|
||||
_IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_MAC_TYPE_BR, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY,
|
||||
iwl_cfg_br, iwl_br_name),
|
||||
#endif /* CONFIG_IWLMLD */
|
||||
};
|
||||
@@ -1398,7 +1382,7 @@ out:
|
||||
VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info *
|
||||
iwl_pci_find_dev_info(u16 device, u16 subsystem_device,
|
||||
u16 mac_type, u8 mac_step, u16 rf_type, u8 cdb,
|
||||
u8 jacket, u8 rf_id, u8 bw_limit, u8 cores, u8 rf_step)
|
||||
u8 jacket, u8 rf_id, u8 no_160, u8 cores, u8 rf_step)
|
||||
{
|
||||
int num_devices = ARRAY_SIZE(iwl_dev_info_table);
|
||||
int i;
|
||||
@@ -1441,15 +1425,8 @@ iwl_pci_find_dev_info(u16 device, u16 subsystem_device,
|
||||
dev_info->rf_id != rf_id)
|
||||
continue;
|
||||
|
||||
/*
|
||||
* Check that bw_limit have the same "boolean" value since
|
||||
* IWL_SUBDEVICE_BW_LIM can only return a boolean value and
|
||||
* dev_info->bw_limit encodes a non-boolean value.
|
||||
* dev_info->bw_limit == IWL_CFG_BW_NO_LIM must be equal to
|
||||
* !bw_limit to have a match.
|
||||
*/
|
||||
if (dev_info->bw_limit != IWL_CFG_BW_ANY &&
|
||||
(dev_info->bw_limit == IWL_CFG_BW_NO_LIM) == !!bw_limit)
|
||||
if (dev_info->no_160 != (u8)IWL_CFG_ANY &&
|
||||
dev_info->no_160 != no_160)
|
||||
continue;
|
||||
|
||||
if (dev_info->cores != (u8)IWL_CFG_ANY &&
|
||||
@@ -1587,13 +1564,13 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
CSR_HW_RFID_IS_CDB(iwl_trans->hw_rf_id),
|
||||
CSR_HW_RFID_IS_JACKET(iwl_trans->hw_rf_id),
|
||||
IWL_SUBDEVICE_RF_ID(pdev->subsystem_device),
|
||||
IWL_SUBDEVICE_BW_LIM(pdev->subsystem_device),
|
||||
IWL_SUBDEVICE_NO_160(pdev->subsystem_device),
|
||||
IWL_SUBDEVICE_CORES(pdev->subsystem_device),
|
||||
CSR_HW_RFID_STEP(iwl_trans->hw_rf_id));
|
||||
if (dev_info) {
|
||||
iwl_trans->cfg = dev_info->cfg;
|
||||
iwl_trans->name = dev_info->name;
|
||||
iwl_trans->bw_limit = dev_info->bw_limit;
|
||||
iwl_trans->no_160 = dev_info->no_160 == IWL_CFG_NO_160;
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_IWLMVM)
|
||||
@@ -1759,11 +1736,27 @@ static int _iwl_pci_resume(struct device *device, bool restore)
|
||||
* Scratch value was altered, this means the device was powered off, we
|
||||
* need to reset it completely.
|
||||
* Note: MAC (bits 0:7) will be cleared upon suspend even with wowlan,
|
||||
* so assume that any bits there mean that the device is usable.
|
||||
* but not bits [15:8]. So if we have bits set in lower word, assume
|
||||
* the device is alive.
|
||||
* For older devices, just try silently to grab the NIC.
|
||||
*/
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ &&
|
||||
!iwl_read32(trans, CSR_FUNC_SCRATCH))
|
||||
device_was_powered_off = true;
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
|
||||
if (!(iwl_read32(trans, CSR_FUNC_SCRATCH) &
|
||||
CSR_FUNC_SCRATCH_POWER_OFF_MASK))
|
||||
device_was_powered_off = true;
|
||||
} else {
|
||||
/*
|
||||
* bh are re-enabled by iwl_trans_pcie_release_nic_access,
|
||||
* so re-enable them if _iwl_trans_pcie_grab_nic_access fails.
|
||||
*/
|
||||
local_bh_disable();
|
||||
if (_iwl_trans_pcie_grab_nic_access(trans, true)) {
|
||||
iwl_trans_pcie_release_nic_access(trans);
|
||||
} else {
|
||||
device_was_powered_off = true;
|
||||
local_bh_enable();
|
||||
}
|
||||
}
|
||||
|
||||
if (restore || device_was_powered_off) {
|
||||
trans->state = IWL_TRANS_NO_FW;
|
||||
|
||||
@@ -558,10 +558,10 @@ void iwl_trans_pcie_free(struct iwl_trans *trans);
|
||||
void iwl_trans_pcie_free_pnvm_dram_regions(struct iwl_dram_regions *dram_regions,
|
||||
struct device *dev);
|
||||
|
||||
bool __iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans);
|
||||
#define _iwl_trans_pcie_grab_nic_access(trans) \
|
||||
bool __iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent);
|
||||
#define _iwl_trans_pcie_grab_nic_access(trans, silent) \
|
||||
__cond_lock(nic_access_nobh, \
|
||||
likely(__iwl_trans_pcie_grab_nic_access(trans)))
|
||||
likely(__iwl_trans_pcie_grab_nic_access(trans, silent)))
|
||||
|
||||
void iwl_trans_pcie_check_product_reset_status(struct pci_dev *pdev);
|
||||
void iwl_trans_pcie_check_product_reset_mode(struct pci_dev *pdev);
|
||||
@@ -1105,7 +1105,8 @@ void iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans, u32 reg,
|
||||
int iwl_trans_pcie_read_config32(struct iwl_trans *trans, u32 ofs,
|
||||
u32 *val);
|
||||
bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans);
|
||||
void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans);
|
||||
void __releases(nic_access_nobh)
|
||||
iwl_trans_pcie_release_nic_access(struct iwl_trans *trans);
|
||||
|
||||
/* transport gen 1 exported functions */
|
||||
void iwl_trans_pcie_fw_alive(struct iwl_trans *trans, u32 scd_addr);
|
||||
|
||||
@@ -2351,7 +2351,8 @@ void iwl_trans_pcie_reset(struct iwl_trans *trans, enum iwl_reset_mode mode)
|
||||
struct iwl_trans_pcie_removal *removal;
|
||||
char _msg = 0, *msg = &_msg;
|
||||
|
||||
if (WARN_ON(mode < IWL_RESET_MODE_REMOVE_ONLY))
|
||||
if (WARN_ON(mode < IWL_RESET_MODE_REMOVE_ONLY ||
|
||||
mode == IWL_RESET_MODE_BACKOFF))
|
||||
return;
|
||||
|
||||
if (test_bit(STATUS_TRANS_DEAD, &trans->status))
|
||||
@@ -2405,7 +2406,7 @@ EXPORT_SYMBOL(iwl_trans_pcie_reset);
|
||||
* This version doesn't disable BHs but rather assumes they're
|
||||
* already disabled.
|
||||
*/
|
||||
bool __iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans)
|
||||
bool __iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent)
|
||||
{
|
||||
int ret;
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
@@ -2457,6 +2458,11 @@ bool __iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans)
|
||||
if (unlikely(ret < 0)) {
|
||||
u32 cntrl = iwl_read32(trans, CSR_GP_CNTRL);
|
||||
|
||||
if (silent) {
|
||||
spin_unlock(&trans_pcie->reg_lock);
|
||||
return false;
|
||||
}
|
||||
|
||||
WARN_ONCE(1,
|
||||
"Timeout waiting for hardware access (CSR_GP_CNTRL 0x%08x)\n",
|
||||
cntrl);
|
||||
@@ -2488,7 +2494,7 @@ bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans)
|
||||
bool ret;
|
||||
|
||||
local_bh_disable();
|
||||
ret = __iwl_trans_pcie_grab_nic_access(trans);
|
||||
ret = __iwl_trans_pcie_grab_nic_access(trans, false);
|
||||
if (ret) {
|
||||
/* keep BHs disabled until iwl_trans_pcie_release_nic_access */
|
||||
return ret;
|
||||
@@ -2497,7 +2503,8 @@ bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans)
|
||||
return false;
|
||||
}
|
||||
|
||||
void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
|
||||
void __releases(nic_access_nobh)
|
||||
iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
|
||||
{
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
|
||||
@@ -2524,6 +2531,7 @@ void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
|
||||
* scheduled on different CPUs (after we drop reg_lock).
|
||||
*/
|
||||
out:
|
||||
__release(nic_access_nobh);
|
||||
spin_unlock_bh(&trans_pcie->reg_lock);
|
||||
}
|
||||
|
||||
|
||||
@@ -1021,7 +1021,7 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans,
|
||||
* returned. This needs to be done only on NICs that have
|
||||
* apmg_wake_up_wa set (see above.)
|
||||
*/
|
||||
if (!_iwl_trans_pcie_grab_nic_access(trans))
|
||||
if (!_iwl_trans_pcie_grab_nic_access(trans, false))
|
||||
return -EIO;
|
||||
|
||||
/*
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
/*
|
||||
* KUnit tests for the iwlwifi device info table
|
||||
*
|
||||
* Copyright (C) 2023-2025 Intel Corporation
|
||||
* Copyright (C) 2023-2024 Intel Corporation
|
||||
*/
|
||||
#include <kunit/test.h>
|
||||
#include <linux/pci.h>
|
||||
@@ -13,9 +13,9 @@ MODULE_IMPORT_NS("EXPORTED_FOR_KUNIT_TESTING");
|
||||
|
||||
static void iwl_pci_print_dev_info(const char *pfx, const struct iwl_dev_info *di)
|
||||
{
|
||||
printk(KERN_DEBUG "%sdev=%.4x,subdev=%.4x,mac_type=%.4x,mac_step=%.4x,rf_type=%.4x,cdb=%d,jacket=%d,rf_id=%.2x,bw_limit=%d,cores=%.2x\n",
|
||||
printk(KERN_DEBUG "%sdev=%.4x,subdev=%.4x,mac_type=%.4x,mac_step=%.4x,rf_type=%.4x,cdb=%d,jacket=%d,rf_id=%.2x,no_160=%d,cores=%.2x\n",
|
||||
pfx, di->device, di->subdevice, di->mac_type, di->mac_step,
|
||||
di->rf_type, di->cdb, di->jacket, di->rf_id, di->bw_limit,
|
||||
di->rf_type, di->cdb, di->jacket, di->rf_id, di->no_160,
|
||||
di->cores);
|
||||
}
|
||||
|
||||
@@ -31,13 +31,8 @@ static void devinfo_table_order(struct kunit *test)
|
||||
di->mac_type, di->mac_step,
|
||||
di->rf_type, di->cdb,
|
||||
di->jacket, di->rf_id,
|
||||
di->bw_limit != IWL_CFG_BW_NO_LIM,
|
||||
di->cores, di->rf_step);
|
||||
if (!ret) {
|
||||
iwl_pci_print_dev_info("No entry found for: ", di);
|
||||
KUNIT_FAIL(test,
|
||||
"No entry found for entry at index %d\n", idx);
|
||||
} else if (ret != di) {
|
||||
di->no_160, di->cores, di->rf_step);
|
||||
if (ret != di) {
|
||||
iwl_pci_print_dev_info("searched: ", di);
|
||||
iwl_pci_print_dev_info("found: ", ret);
|
||||
KUNIT_FAIL(test,
|
||||
|
||||
@@ -102,7 +102,6 @@ int plfxlc_mac_init_hw(struct ieee80211_hw *hw)
|
||||
void plfxlc_mac_release(struct plfxlc_mac *mac)
|
||||
{
|
||||
plfxlc_chip_release(&mac->chip);
|
||||
lockdep_assert_held(&mac->lock);
|
||||
}
|
||||
|
||||
int plfxlc_op_start(struct ieee80211_hw *hw)
|
||||
|
||||
@@ -1085,7 +1085,13 @@ static void __ieee80211_tx_status(struct ieee80211_hw *hw,
|
||||
|
||||
ieee80211_report_used_skb(local, skb, false, status->ack_hwtstamp);
|
||||
|
||||
if (status->free_list)
|
||||
/*
|
||||
* This is a bit racy but we can avoid a lot of work
|
||||
* with this test...
|
||||
*/
|
||||
if (local->tx_mntrs)
|
||||
ieee80211_tx_monitor(local, skb, retry_count, status);
|
||||
else if (status->free_list)
|
||||
list_add_tail(&skb->list, status->free_list);
|
||||
else
|
||||
dev_kfree_skb(skb);
|
||||
|
||||
Reference in New Issue
Block a user