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drm/rockchp: dw-dp: set a suitable hsync limit value

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In actual test, the min hsync value is 9, So it just need filter
the display mode whose hsync value is less than 9.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I06bc52c1f8b45894ee9813c8d014e6a9e3f48df6
This commit is contained in:
Zhang Yubing
2022-07-11 12:13:20 +08:00
committed by Tao Huang
parent e3006fca4f
commit 2703184e9d
1 changed files with 3 additions and 3 deletions
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drivers/gpu/drm/rockchip/dw-dp.c
+3 -3
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@@ -2023,6 +2023,9 @@ static int dw_dp_bridge_mode_valid(struct drm_bridge *bridge,
if (dp->split_mode)
drm_mode_convert_to_origin_mode(&m);
if (m.hsync_end - m.hsync_start <= 8)
return MODE_HSYNC_NARROW;
if (info->color_formats & DRM_COLOR_FORMAT_YCRCB420 &&
link->vsc_sdp_extension_for_colorimetry_supported &&
(drm_mode_is_420_only(info, &m) || drm_mode_is_420_also(info, &m)))
@@ -2038,9 +2041,6 @@ static int dw_dp_bridge_mode_valid(struct drm_bridge *bridge,
drm_mode_is_420_only(info, &m))
return MODE_NO_420;
if (m.hsync_end - m.hsync_start < 32)
return MODE_HSYNC_NARROW;
if (!dw_dp_bandwidth_ok(dp, &m, min_bpp, link->lanes, link->rate))
return MODE_CLOCK_HIGH;