arm64: dts: imx95: add PCIe's msi-map and iommu-map property
Add PCIe's msi-map and iommu-map property because i.MX95 support smmu and its. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@@ -1615,6 +1615,12 @@
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assigned-clock-parents = <0>, <0>,
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<&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
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power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
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/* pcie0's Devid(BIT[7:6]) is 0x00, stream id(BIT[5:0]) is 0x10~0x17 */
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msi-map = <0x0 &its 0x10 0x1>,
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<0x100 &its 0x11 0x7>;
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iommu-map = <0x000 &smmu 0x10 0x1>,
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<0x100 &smmu 0x11 0x7>;
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iommu-map-mask = <0x1ff>;
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fsl,max-link-speed = <3>;
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status = "disabled";
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};
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@@ -1682,6 +1688,14 @@
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assigned-clock-parents = <0>, <0>,
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<&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
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power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
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/* pcie1's Devid(BIT[7:6]) is 0x10, stream id(BIT[5:0]) is 0x18~0x1f */
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msi-map = <0x0 &its 0x98 0x1>,
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<0x100 &its 0x99 0x7>;
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msi-map-mask = <0x1ff>;
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/* smmu have not Devid(BIT[7:6]) */
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iommu-map = <0x000 &smmu 0x18 0x1>,
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<0x100 &smmu 0x19 0x7>;
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iommu-map-mask = <0x1ff>;
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fsl,max-link-speed = <3>;
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status = "disabled";
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};
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