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arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp21 SoCs

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Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped
16 times over a 64kB region.
The offset is then adjusted in the irq-gic driver.

see commit 12e14066f4 ("irqchip/GIC: Add workaround for aliased GIC400")

Fixes: 7a57b1bb1a ("arm64: dts: st: introduce stm32mp21 SoCs family")
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Link: https://lore.kernel.org/r/20250415111654.2103767-5-christian.bruel@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Christian Bruel
2025-04-28 14:07:01 +02:00
committed by Arnd Bergmann
parent 02dc83f09c
commit 1bc229e9bb
1 changed files with 3 additions and 3 deletions
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arch/arm64/boot/dts/st/stm32mp211.dtsi
+3 -3
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@@ -118,9 +118,9 @@
intc: interrupt-controller@4ac10000 {
compatible = "arm,gic-400";
reg = <0x4ac10000 0x0 0x1000>,
<0x4ac20000 0x0 0x2000>,
<0x4ac40000 0x0 0x2000>,
<0x4ac60000 0x0 0x2000>;
<0x4ac20000 0x0 0x20000>,
<0x4ac40000 0x0 0x20000>,
<0x4ac60000 0x0 0x20000>;
#interrupt-cells = <3>;
interrupt-controller;
};