ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl
The property is "fsl,pins", not "fsl,pin". Wrong property means the pin
configuration was not applied. Fixes dtbs_check warnings:
imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pins' is a required property
imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pin' does not match any of the regexes: 'pinctrl-[0-9]+'
Cc: stable@vger.kernel.org
Fixes: a58e4e608b ("ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
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Shawn Guo
parent
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1b0e32753d
@@ -365,7 +365,7 @@
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};
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pinctrl_tsc: tscgrp {
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fsl,pin = <
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
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MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
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MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
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