twx-linux/drivers/perf
Shifrin Dmitry fa12277fa2 perf: riscv: Fix selecting counters in legacy mode
[ Upstream commit 941a8e9b7a86763ac52d5bf6ccc9986d37fde628 ]

It is required to check event type before checking event config.
Events with the different types can have the same config.
This check is missed for legacy mode code

For such perf usage:
    sysctl -w kernel.perf_user_access=2
    perf stat -e cycles,L1-dcache-loads --
driver will try to force both events to CYCLE counter.

This commit implements event type check before forcing
events on the special counters.

Signed-off-by: Shifrin Dmitry <dmitry.shifrin@syntacore.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Fixes: cc4c07c89aad ("drivers: perf: Implement perf event mmap support in the SBI backend")
Link: https://lore.kernel.org/r/20240729125858.630653-1-dmitry.shifrin@syntacore.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-11 12:47:23 +02:00
..
amlogic
arm_cspmu
hisilicon drivers/perf: hisi: hns3: Actually use devm_add_action_or_reset() 2024-06-12 11:11:47 +02:00
alibaba_uncore_drw_pmu.c
apple_m1_cpu_pmu.c
arm_dmc620_pmu.c perf/arm-dmc620: Fix lockdep assert in ->event_init() 2024-06-12 11:12:46 +02:00
arm_dsu_pmu.c
arm_pmu_acpi.c
arm_pmu_platform.c
arm_pmu.c
arm_pmuv3.c
arm_smmuv3_pmu.c
arm_spe_pmu.c
arm-cci.c
arm-ccn.c
arm-cmn.c perf/arm-cmn: Workaround AmpereOneX errata AC04_MESH_1 (incorrect child count) 2024-03-26 18:19:10 -04:00
cxl_pmu.c perf: CXL: fix CPMU filter value mask length 2024-03-26 18:19:12 -04:00
fsl_imx8_ddr_perf.c
fsl_imx9_ddr_perf.c perf: imx_perf: fix counter start and config sequence 2024-08-11 12:47:17 +02:00
Kconfig
Makefile
marvell_cn10k_ddr_pmu.c
marvell_cn10k_tad_pmu.c
qcom_l2_pmu.c
qcom_l3_pmu.c
riscv_pmu_legacy.c
riscv_pmu_sbi.c perf: riscv: Fix selecting counters in legacy mode 2024-08-11 12:47:23 +02:00
riscv_pmu.c drivers/perf: riscv: Disable PERF_SAMPLE_BRANCH_* while not supported 2024-04-10 16:35:58 +02:00
thunderx2_pmu.c
xgene_pmu.c